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LC651154F Просмотр технического описания (PDF) - SANYO -> Panasonic

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Компоненты Описание
производитель
LC651154F Datasheet PDF : 39 Pages
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LC651154N, 651154F, 651154L, 651152N, 651152F, 651152L
LC651154L, LC651152L
Circuit type
Frequency
Divider option
(cycle time)
VDD range
Notes
400 kHz
1/1 (10 µs)
2.2 to 6 V
Cannot be used with the divide-by-three
and divide-by-four options.
Ceramic oscillator
800 kHz
1 MHz
1/1 (5 µs)
1/3 (15 µs)
1/4 (20 µs)
1/1 (4 µs)
1/3 (12 µs)
1/4 (16 µs)
2.2 to 6 V
2.2 to 6 V
2.2 to 6 V
2.2 to 6 V
2.2 to 6 V
2.2 to 6 V
4 MHz
1/4 (4 µs)
Cannot be used with either the no divider
2.2 to 6 V circuit option or the divide-by-three circuit
option.
External clock used with the 2-pin RC oscillator circuit
Two-pin RC
External clock used with the ceramic oscillator option
200 k to 1040 kHz 1/1 (20 to 3.84 µs) 2.2 to 6 V
600 k to 3120 kHz 1/3 (20 to 3.84 µs) 2.2 to 6 V
800 k to 4160 kHz 1/4 (20 to 3.84 µs) 2.2 to 6 V
Use the no divider circuit option and the 2.2 to 6 V
recommended circuit constants. If using other circuit
constants is unavoidable, the application must use a
frequency identical to the external clock and observe
the VDD range specification.
External clock drive is not possible. To use external clock drive, select the 2-pin RC oscillator option.
Port C and D Output Level During Reset Option
The output level during a reset can be selected from the two options below in 4-bit units for the C and D ports.
Option
High-level output during reset
Low-level output during reset
Conditions and other notes
Ports C and D in 4-bit units
Ports C and D in 4-bit units
Port Output Type Option
The following two options may be selected for the I/O ports individually (bit units).
Option
Circuit
Applicable ports
1. Open-drain output
2. Built-in pull-up resistor
Ports A, C, D, E, F, and G
Watchdog Reset Option
This option allows the PE1/WDR pin to be selected either to be used as the normal port PE1 or to be used as the
watchdog reset pin WDR.
No. 6278-11/39

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