56F8156 Просмотр технического описания (PDF) - Freescale Semiconductor

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производитель

56F8156

16-bit Digital Signal Controllers

Freescale Semiconductor 

Architecture Block Diagram

5

JTAG / EOnCE

CHIP

TAP

Controller

pdb_m[15:0]

pab[20:0]

cdbw[31:0]

56800E

Boot

Flash

Program

Flash

Program

RAM

17

Address

EMI

16

Data

6

Control

TAP

Linking

External

JTAG

Port

xab1[23:0]

xab2[23:0]

cdbr_m[31:0]

xdb2_m[15:0]

Data RAM

Data Flash

IPBus

Bridge

To Flash

Control Logic

Note:

Note:

NOT available on the 56F8156 device.

IPBus

Figure 1-1 System Bus Interfaces

Flash

Module

Flash memories are encapsulated within the Flash Module(FM). Flash control is accomplished by the

I/O to the FM over the peripheral bus, while reads and writes are completed between the core and the

Flash memories.

The primary data RAM port is 32 bits wide. Other data ports are 16 bits.

56F8356 Technical Data, Rev. 13

Freescale Semiconductor

11

Preliminary

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