E602204_HD64413A Просмотр технического описания (PDF) - Mitsumi

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E602204_HD64413A

SuperH RISC engine Peripheral LSI

Mitsumi 

Figure C.2 Comparison of (a) 8-Point Drawing and (b) 4-Point Drawing................................ 317

Figure C.3 Drawing Dot Determination Process in (a) 8-Point Drawing and

(b) 4-Point Drawing ............................................................................................. 317

Appendix D Package Dimensions

Figure D.1 Package Dimensions (FP-176).............................................................................. 319

Appendix F Example of System Configuration for SuperH

Figure F.1 Example of System Configuration Overview......................................................... 326

Figure F.2 Example of Interface Timing ................................................................................ 327

Figure F.3 Example of Memory Mapping (Using SH7709) .................................................... 329

Figure F.4 UGM Memory Map.............................................................................................. 331

Figure F.5 UGM Address Transition Overview ...................................................................... 332

Appendix G Example of Display Control

Figure G.1 Example of Display Timing ................................................................................. 334

Figure G.2 Example of Display Timing under Non-interlace Mode ........................................ 336

Figure G.3 Example of Display Timing under Interlace Sink & Video Mode .......................... 338

Figure G.4 Cursor Allocation................................................................................................. 341

Appendix H Example of Drawing Control

Figure H.1 Display/Drawing Control Timing Chart (DBF = 0) ............................................... 344

Figure H.2 Example of Referencing and Branching................................................................ 346

Appendix I Drawing Performance

Figure I.1 POLYGON4C Drawing Performance when FST = 0

(Drawing Range: 320 (H) × 240 (V))...................................................................... 351

Figure I.2 POLYGON4C Drawing Performance when FST = 1

(Drawing Range: 320 (H) × 240 (V))...................................................................... 352

Figure I.3 POLYGON4C Drawing Performance when FST = 0

(Drawing Range: 320 (H) × 240 (V))...................................................................... 353

Appendix J Usage of Video Capture Function

Figure J.1 Interlace Composite Capture.................................................................................. 355

Figure J.2 Interlace Composite Capture (Horizontal and Vertical Reduction Ratios = 1/4) ...... 357

Figure J.3 Example of Video Data Usage............................................................................... 359

Figure J.4 Q2SD Video Setting Flow (1)................................................................................ 360

Figure J.5 Q2SD Video Setting Flow (2)................................................................................ 361

Figure J.6 Q2SD Video Setting Flow (3)................................................................................ 362

Figure J.7 Example of Connection of Video Capture Circuit .................................................. 363

Figure J.8 Example of Interlaced Data Output Timing for Decoder......................................... 364

Rev. 2.0, 09/02, page xvi of xviii

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