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ADM1276-3ACPZ-RL(Rev0) Просмотр технического описания (PDF) - Analog Devices

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ADM1276-3ACPZ-RL Datasheet PDF : 48 Pages
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ADM1276
Pin No. Mnemonic
16
GATE
17
SENSE−
18
SENSE+
N/A1 EP
1 N/A means not applicable.
Description
Gate Output Pin. This pin is the high-side gate drive of an external N-channel FET. This pin is driven by the FET
drive controller, which uses a charge pump to provide a pull-up current to charge the FET gate pin. The FET drive
controller regulates to a maximum load current by regulating the GATE pin. GATE is held low when the supply is
below UVLO.
Negative Current Sense Input Pin. A sense resistor between the SENSE+ pin and the SENSE− pin sets the analog
current limit. The hot swap operation of the ADM1276 controls the external FET gate to maintain the sense
voltage (VSENSE+ − VSENSE−). This pin also connects to the FET drain pin.
Positive Current Sense Input Pin. This pin connects to the main supply input. A sense resistor between the
SENSE+ pin and the SENSE− pin sets the analog current limit. The hot swap operation of the ADM1276 controls
the external FET gate to maintain the sense voltage (VSENSE+ − VSENSE−). This pin is also used to measure the supply
input voltage using the ADC.
Exposed Pad. The exposed pad is located on the underside of the LFCSP package. Solder the exposed pad to the
printed circuit board (PCB) to improve thermal dissipation. The exposed pad can be connected to ground.
Rev. 0 | Page 10 of 48

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