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ADM1276-3ACPZ-RL(Rev0) Просмотр технического описания (PDF) - Analog Devices

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ADM1276-3ACPZ-RL Datasheet PDF : 48 Pages
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ADM1276
Parameter
Address Set to 11
Input Current for Address 11
Symbol
SERIAL BUS DIGITAL INPUTS
(SDA, SCL)
Input High Voltage
Input Low Voltage
Output Low Voltage
Input Leakage
VIH
VIL
VOL
ILEAK-PIN
Nominal Bus Voltage
VDD
Capacitance for SDA, SCL CPIN
Pins
Input Glitch Filter
tSP
Min Typ
2
3
1.1
−10
−5
2.7
5
0
Max Unit Test Conditions/Comments
V Connect to VCAP
10 μA VADR = 2.0 V to VCAP; must not exceed the maximum allowable
current draw from VCAP
V
0.8 V
0.4 V
IOL = 4 mA
+10 μA
+5 μA Device is not powered
5.5 V 3 V to 5 V ± 10%
pF
50 ns
SERIAL BUS TIMING CHARACTERISTICS
Table 2.
Parameter
fSCLK
tBUF
Description
Clock frequency
Bus free time
tHD;STA
tSU;STA
tSU;STO
tHD;DAT
tSU;DAT
tLOW
tHIGH
tR
tF
Start hold time
Start setup time
Stop setup time
SDA hold time
SDA setup time
SCL low time
SCL high time
SCL, SDA rise time
SCL, SDA fall time
Min
Typ Max Unit
400 kHz
1.3
μs
4.7
μs
0.6
μs
0.6
μs
0.6
μs
300
900 ns
100
ns
1.3
μs
0.6
μs
20
300 ns
20
300 ns
Test Conditions/Comments
Following the stop condition of a read transaction
Following the stop condition of a write transaction
Timing Diagram
VIH
SCL VIL
VIH
SDA VIL
tBUF
P
S
tLOW
tR
tF
tHD;DAT
tHD;STA
tHIGH
tSU;STA
tSU;DAT
S
Figure 2. Serial Bus Timing Diagram
tSU;STO
P
Rev. 0 | Page 7 of 48

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