ADM1276-3ACPZ-RL(Rev0) Просмотр технического описания (PDF) - Analog Devices
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производитель
ADM1276-3ACPZ-RL
(Rev.:Rev0)
(Rev.:Rev0)
Analog Devices
ADM1276-3ACPZ-RL Datasheet PDF : 48 Pages
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ADM1276
SPECIFICATIONS
VCC = 2.95 V to 20 V, VCC ≥ VSENSE+, VSENSE+ = 2 V to 20 V, VSENSE = (VSENSE+ − VSENSE−) = 0 V, TA = −40°C to +85°C, unless otherwise noted.
Table 1.
Parameter
POWER SUPPLY
Operating Voltage Range
Undervoltage Lockout
Undervoltage Hysteresis
Quiescent Current
UV PIN
Input Current
UV Threshold
UV Threshold Hysteresis
UV Glitch Filter
UV Propagation Delay
OV PIN
Input Current
OV Threshold
OV Threshold Hysteresis
OV Glitch Filter
OV Propagation Delay
SENSE+ AND SENSE− PINS
Input Current
Input Imbalance
VCAP PIN
Internally Regulated
Voltage
ISET PIN
Reference Select Threshold
Internal Reference
Gain of Current Sense
Amplifier
Input Current
GATE PIN
Gate Drive Voltage
Gate Pull-Up Current
Gate Pull-Down Current
Regulation
Slow
Fast
Gate Holdoff Resistance
HOT SWAP SENSE VOLTAGE
Hot Swap Sense Voltage
Current Limit
Foldback Inactive
Symbol Min Typ
VCC
2.95
2.4
90
ICC
IUV
UVTH
UVHYST
UVGF
UVPD
0.97 1.0
40 50
2
5
IOV
OVTH
OVHYST
OVGF
OVPD
0.97 1.0
50 60
0.5
1.0
ISENSEx
IΔSENSE
VVCAP
2.66 2.7
VISETRSTH
VCLREF
AVCSAMP
IISET
1.35 1.5
1
50
ΔVGATE
IGATEUP
IGATEDN
IGATEDN_REG
IGATEDN_SLOW
IGATEDN_FAST
10
4.5
8
4.5
−20
45
5
750
12
60
10
1500
20
VSENSECL
19.6 20
24.6 25
19.6 20
9.6 10
4.6 5
Max
20
2.7
120
5
100
1.03
60
7
8
100
1.03
70
1.5
2
150
5
2.74
1.65
100
14
13
10
6
−30
75
15
2000
20.4
25.4
20.4
10.4
5.4
Unit Test Conditions/Comments
V
V
VCC rising
mV
mA GATE on and power monitor running
nA UV ≤ 3.6 V
V UV falling
mV
μs 50 mV overdrive
μs UV low to GATE pull-down active
nA OV ≤ 3.6 V
V OV rising
mV
μs 50 mV overdrive
μs OV high to GATE pull-down active
μA Per individual pin; SENSE+, SENSE− = 20 V
μA
IΔSENSE = (ISENSE+) − (ISENSE−)
V
0 μA ≤ IVCAP ≤ 100 μA; CVCAP = 1 μF
V
If VISET > VISETRSTH, an internal 1 V reference (VCLREF) is used
V Accuracies included in total sense voltage accuracies
V/V Accuracies included in total sense voltage accuracies
nA
VISET ≤ VVCAP
Maximum voltage on the gate is always clamped to ≤31 V
ΔVGATE = VGATE − VSENSE+
V
17 V ≥ VCC ≥ 8 V; IGATE ≤ 5 μA
V
20 V ≥ VCC ≥ 17 V; IGATE ≤ 5 μA
V
VSENSE+ = VCC = 5 V; IGATE ≤ 5 μA
V
VSENSE+ = VCC = 2.95 V; IGATE ≤ 1 μA
μA VGATE = 0 V
μA VGATE ≥ 2 V; VISET = 1.0 V; (SENSE+) − (SENSE−) = 30 mV
mA VGATE ≥ 2 V
mA VGATE ≥ 12 V; VCC ≥ 12 V
Ω
VCC = 0 V
mV VISET > 1.65 V; VFLB > 1.12 V; VGATE = (SENSE+) + 3 V; IGATE = 0 μA;
VSS ≥ 2 V
VGATE = (SENSE+) + 3 V; IGATE = 0 μA; VSS ≥ 2 V
mV VISET = 1.25 V; VFLB > 1.395 V
mV VISET = 1.0 V; VFLB > 1.12 V
mV VISET = 0.5 V; VFLB > 0.57 V
mV VISET = 0.25 V; VFLB > 0.295 V
Rev. 0 | Page 4 of 48
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