ST18D952 Просмотр технического описания (PDF) - STMicroelectronics

Номер в каталоге

Компоненты Описание

производитель

ST18D952

DIGITAL SIGNAL PROCESSOR (DSP) CHIP

STMicroelectronics 

ST18952

5 Memory

5.1 Internal memory resource

One 32 Kword and two 8 Kword single port memories are included on-chip:

• Instruction memory on I space from address 0 to 32767 (32 K)

• X-Data memory on X space from address 0 to 8191 (8 K)

• Y-Data memory on Y space from address 0 to 8191 (8 K)

One 512 word dual port memory is shared on X and Y spaces, from addresses 8192 (8 K) to

8703 (8.5K). This is represented graphically below.

Note: the first 256 addresses of the Y space are reserved for the D950 memory-mapped

registers and for on-chip memory mapped peripherals.

Memory can be extended off-chip for all three spaces in two ways:

1: Directly - Accesses to program and data memories can be performed simulta-

neously. Insertion of wait-states is necessary in case of nominal frequency

work.

2: Through the bus switch unit - Accesses to the different external spaces are mul-

tiplexed and wait-states are added.

The specific details on the operation of the BSU are described separately in ”Bus Switch Unit”

on page 18.

Figure 5.1 Memory mapping

FFFF

X-memory

64k FFFF

Y-memory

64k FFFF

I-memory

64k

External

External

External

8000

32k

21FF

8.5k 21FF

8.5k

1FFF Internal DPRAM 8k 1FFF Internal DPRAM 8k

Internal SPRAM

0000

Internal SPRAM

0100

Registers

All addresses are hexadecimal

External memory is accessed directly or through the bus switch

Internal SPRAM

15/66

Share Link: