ST18952
4 D950Core
The D950Core is composed of three main units.
• Data Calculation Unit (DCU)
• Address Calculation Unit (ACU)
• Program Control Unit (PCU)
For full details of the D950 DSP core refer to the D950Core datasheet (document number 42-
1709).
These units are organized in an HARVARD architecture around three bidirectional 16-bit
buses, two for data and one for instruction. Each of these buses is dedicated to an uni-
directional 16-bit address bus (XA/YA/IA).
An 8-bit general purpose parallel port (P0-P7) can be configured (input or output). A test
condition is attached to each bit to test external events.
The D950Core is controlled through interface pins related to interrupt, low-power mode, reset
and miscellaneous functions.
Figure 4.1 D950Core block diagram
DA TA
CALCULATION
UNI T
Control
6
16
ADDRESS
CALCULATION XA-bus
16
16
UNIT
YA -bus
16
PROGRAM
3
CONTROL
UNIT
ID-bus
16
IA -bus
16
12/66
11
8
CONTROL PO/P7
14
TEST & EMULATION