ST18D952 Просмотр технического описания (PDF) - STMicroelectronics

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ST18D952

DIGITAL SIGNAL PROCESSOR (DSP) CHIP

STMicroelectronics 

ST18952

4.1 D950Core registers

Register

BX

MX

BY

MY

POR

PIR

PCDR

PCSR

Function

Modulo base address for X-memory space

Modulo maximum address for X-memory space

Modulo base address for Y-memory space

Modulo maximum address for Y-memory space

Port Output Register - 8LSB are significant, 8MSB are undefined when reading

Port Input Register

Port Control Direction Register

Port Control Sensitivity Register

PCDR

The Port Control Direction register defines the data direction of each port pin. After reset,

PCDR default value is 0 (Port pins are configured as inputs)

15 14 13 12 11 10 9

-------

876543210

- P7D P6D P5D P4D P3D P2D P1D P0D

Bit

PiD

Bits 8 - 15

Function

Port pin direction

0: Input port pin (def.)

1: Output port pin

RESERVED (read: undefined, write: don’t care)

PCSR

The Port Control Sensitivity register defines sensitivity of each port pin. After reset, PCSR

default value is 0 (Port pins are configured as level-sensitive).

15 14 13 12 11 10 9

-------

876543210

- P7S P6S P5S P4S P3S P2S P1S P0S

Bit

PiS

Bits 8 - 15

Function

Port pin sensitivity

0: Level sensitive (def.)

1: Edge sensitive

RESERVED (read: undefined, write: don’t care)

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