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M4A5-384/128-5SAC Просмотр технического описания (PDF) - Lattice Semiconductor

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M4A5-384/128-5SAC Datasheet PDF : 63 Pages
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ispMACH 4A TIMING PARAMETERS OVER OPERATING RANGES1
-5
-55
-6
-65
-7
-10
-12
-14
Min Max Min Max Min Max Min Max Min Max Min Max Min Max Min Max Unit
Frequency:
External feedback, D-type, Min of
1/(tWLS + tWHS) or 1/(tSS + tCOS)
143
133
125
118
95.2
87.0
74.1
60.6
MHz
External feedback, T-type, Min of 1/(tWLS
+ tWHS) or 1/(tSST + tCOS)
125
125
118
111
87.0
80.0
69.0
57.1
MHz
fMAXS
Internal feedback (fCNT), D-type, Min of
1/(tWLS + tWHS) or 1/(tSS + tCOSi)
182
167
160
154
125
118
95.0
74.1
MHz
Internal feedback (fCNT), T-type, Min of
1/(tWLS + tWHS) or 1/(tSST + tCOSi)
154
154
148
143
111
105
87.0
69.0
MHz
No feedback2, Min of 1/(tWLS + tWHS), 250
250
200
200
154
125
100
83.3
MHz
1/(tSS + tHS) or 1/(tSST + tHS)
External feedback, D-type, Min of 1/
(tWLA + tWHA) or 1/(tSA + tCOA)
111
111
108
100
83.3
66.7
55.6
43.5
MHz
External feedback, T-type, Min of 1/(tWLA
+ tWHA) or 1/(tSAT + tCOA)
105
105
102
95.2
76.9
62.5
52.6
41.7
MHz
fMAXA
Internal feedback (fCNTA), D-type, Min of
1/(tWLA + tWHA) or 1/(tSA + tCOAi)
133
133
125
125
105
83.3
66.7
50.0
MHz
Internal feedback (fCNTA), T-type, Min of
1/(tWLA + tWHA) or 1/(tSAT + tCOAi)
125
125
125
118
95.2
76.9
62.5
47.6
MHz
No feedback2, Min of 1/(tWLA + tWHA), 167
167
143
143
125
100
62.5
55.6
MHz
1/(tSA + tHA) or 1/(tSAT + tHA)
Maximum input register frequency, Min
fMAXI of 1/(tWIRH + tWIRL) or 1/(tSIRS + tHIRS) 167
167
143
143
125
100
83.3
83.3
MHz
Notes:
1. See “Switching Test Circuit” document on the Literature Download page of the Lattice web site.
2. This parameter does not apply to flip-flops in the emulated mode since the feedback path is required for emulation.
CAPACITANCE 1
Parameter Symbol
CIN
CI/O
Parameter Description
Input capacitance
Output capacitance
Test Conditions
Typ
Unit
VIN=2.0 V
VOUT=2.0V
3.3 V or 5 V, 25°C, 1 MHz
6
pF
3.3 V or 5 V, 25°C, 1 MHz
8
pF
Note:
1. These parameters are not 100% tested, but are calculated at initial characterization and at any time the design is modified where this parameter may be affected.
40
ispMACH 4A Family

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