MT90881 Просмотр технического описания (PDF) - Zarlink Semiconductor Inc

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производитель

MT90881

TDM to Packet Processors

Zarlink Semiconductor Inc 

MT90880/1/2/3

Data Sheet

Signal

m0_txclk

m0_rxd[3:0]

m0_rxdv

m0_rxclk

m0_rxer

m0_crs

m0_col

MII Port B

m_mint1

m1_txd[3:0]

m1_txen

m1_txclk

m1_rxd[3:0]

m1_rxdv

m1_rxclk

m1_rxer

m1_crs

m1_col

I/O

Package Balls

I U AB9

I U AF8 [3], AE8 [2], AE9 [1], AD9 [0]

I D AF7

I U AB10

I D AD8

I D AC9

I D AE7

Description

Transmit clock

Receive data

Receive data valid

Receive clock

Receive error

Carrier sense

Collision detect

I U AE11

O U AC11 [3], AE10 [2], AF10 [1], AD11

[0]

O U AD10

I U AB12

I U AF12 [3], AD13 [2], AE13 [1], AF13

[0]

I D AE12

I U AC13

I D AD12

I D AC12

I D AF11

MII management interrupt for port B

Transmit data

Transmit enable

Transmit clock

Receive data

Receive data valid

Receive clock

Receive error

Carrier sense

Collision detect

Table 6 - MII Interfaces (continued)

3.3.2 RMII Interfaces

The RMII is a low pin count MII interface. It has no defined standard, but the RMII Consortium publishes details

(reference 3, Table 2). The MT90880 RMII Interface shares the same pins as the MII interface with the

exception of the REF_CLK.

The RMII comprises a low pin count Reduced Media Independent InterfaceTM (RMIITM) specification intended for

use between Ethernet PHYs and Switch ASICs. Under IEEE 802.3u [2] an MII, comprised of 16 pins for data

and control, is defined. In devices incorporating many MACs or PHY interfaces such as switches, the number of

pins can add significant cost as the port counts increase. The purpose of this interface is to provide a low cost

alternative to the IEEE 802.3u [2] MII. Architecturally, the RMII specification provides for an additional

reconciliation layer on either side of the MII but can be implemented in the absence of an MII. The management

interface (MDIO/MDC) is assumed to be identical to that defined in IEEE 802.3u [2].

All RMII signals are 5 V tolerant.

All RMII outputs are high impedance while S_RST is low.

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Zarlink Semiconductor Inc.

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