56F8156 Просмотр технического описания (PDF) - Freescale Semiconductor

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56F8156

16-bit Digital Signal Controllers

Freescale Semiconductor 

Table 2-2 Signal and Package Information for the 144-Pin LQFP (Continued)

Signal Name Pin No. Type

State

During

Reset

Signal Description

SS0

(GPIOE7)

129

Input

Input,

SPI 0 Slave Select — SS0 is used in slave mode to indicate to the

pull-up SPI module that the current transfer is to be received.

enabled

Input/

Port E GPIO — This GPIO pin can be individually programmed as

Output

input or output pin.

After reset, the default state is SS0.

PHASEA1

(TB0)

To deactivate the internal pull-up resistor, clear bit 7 in the

GPIOE_PUR register.

6

Schmitt

Input,

Phase A1 — Quadrature Decoder 1, PHASEA input for decoder 1.

Input

pull-up

enabled

Schmitt

TB0 — Timer B, Channel 0

Input/

Output

(SCLK1)

(GPIOC0)

Schmitt

Input/

Output

Schmitt

Input/

Output

SPI 1 Serial Clock — In the master mode, this pin serves as an

output, clocking slaved listeners. In slave mode, this pin serves as

the data clock input. To activate the SPI function, set the

PHSA_ALT bit in the SIM_GPS register. For details, see Part

6.5.8.

Port C GPIO — This GPIO pin can be individually programmed as

an input or output pin.

In the 56F8356, the default state after reset is PHASEA1.

In the 56F8156, the default state is not one of the functions offered

and must be reconfigured.

To deactivate the internal pull-up resistor, clear bit 0 in the

GPIOC_PUR register.

56F8356 Technical Data, Rev. 13

30

Freescale Semiconductor

Preliminary

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