MAX3672 Просмотр технического описания (PDF) - Maxim Integrated

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MAX3672

Low-Jitter 155MHz/622MHz Clock Generator

Maxim Integrated 

Low-Jitter 155MHz/622MHz Clock Generator

DC ELECTRICAL CHARACTERISTICS (continued)

(VCC = +3.3V ±10% or VCC = +5.0V ±10%, TA = -40°C to +85°C. Typical values are at VCC = +3.3V and TA = +25°C, unless other-

wise noted.) (Note 1)

PARAMETER

SYMBOL

CONDITIONS

MIN

OPERATIONAL AMPLIFIER SPECIFICATIONS (Note 3)

VCC = +3.3V ±10%

0.3

Op Amp Output Voltage Range

VO

VCC = +5.0V ±10%

0.5

Op Amp Input Offset Voltage

| VOS |

Op Amp Open-Loop Gain

AOL

PHASE FREQUENCY DETECTOR (PFD)/CHARGE-PUMP (CP) SPECIFICATIONS (Note 4)

Full-Scale PFD/CP Output

Current

| IPD |

High gain

Low gain

16.0

4.0

PFD/CP Offset Current

High gain

Low gain

TYP MAX UNITS

VCC -

0.3

V

VCC -

0.5

3

mV

90

dB

20

24.4

µA

5

6.2

0.80

%

1.08 | IPD |

AC ELECTRICAL CHARACTERISTICS

(VCC = +3.3V ±10% or VCC = +5.0V ±10%, TA = -40°C to +85°C. Typical values are at VCC = +3.3V and TA = +25°C, unless other-

wise noted.) (Note 5)

PARAMETER

SYMBOL

CLOCK OUTPUT SPECIFICATIONS

Clock Output Frequency

CONDITIONS

Optional Clock Output

Frequency

fVCO = 622MHz

fVCO = 155MHz

Clock Output Rise/Fall Time

Measured from 20% to 80%

Clock Output Duty Cycle

(Note 6)

NOISE SPECIFICATIONS

Random Noise Voltage at Loop-

Filter Output

VNOISE Freq > 1kHz (Note 7)

Spurious Noise Voltage at Loop-

Filter Output

(Note 8)

Power-Supply Rejection at Loop-

Filter Output

PSR

(Note 9)

REFERENCE CLOCK INPUT SPECIFICATIONS

Reference Clock Frequency

Reference Clock Duty Cycle

MIN TYP MAX UNITS

700

622/311/

155/78

155/78/

38/19

280

45

55

MHz

MHz

ps

%

1.14

µVRMS

/√Hz

50

µVRMS

30

dB

622/

155/78/ 700

19

30

70

MHz

%

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