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LPC2114 Просмотр технического описания (PDF) - NXP Semiconductors.

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LPC2114 Datasheet PDF : 42 Pages
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NXP Semiconductors
LPC2114/2124
Single-chip 16/32-bit microcontrollers
However, the ISP flash erase command can be executed at any time (no matter whether
the CRP is on or off). Removal of CRP is achieved by erasure of full on-chip user flash.
With the CRP off, full access to the chip via the JTAG and/or ISP is restored.
6.3 On-chip static RAM
On-chip static RAM may be used for code and/or data storage. The SRAM may be
accessed as 8 bit, 16 bit, and 32 bit. The LPC2114/2124 provide 16 kB of static RAM.
6.4 Memory map
The LPC2114/2124 memory maps incorporate several distinct regions, as shown in
Figure 3.
In addition, the CPU interrupt vectors may be re-mapped to allow them to reside in either
flash memory (the default) or on-chip static RAM. This is described in Section 6.17
“System control”.
LPC2114_2124
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 7 — 10 June 2011
© NXP B.V. 2011. All rights reserved.
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