NXP Semiconductors
LPC2114/2124
Single-chip 16/32-bit microcontrollers
6.8.1 Features
• Measurement range of 0 V to 3 V.
• Capable of performing more than 400000 10-bit samples per second.
• Burst conversion mode for single or multiple inputs.
• Optional conversion on transition on input pin or Timer Match signal.
• Every analog input has a dedicated result register to reduce interrupt overhead.
• Every analog input can generate an interrupt once the conversion is completed.
6.8.2 ADC features available in LPC2114/2124/01 only
• Every analog input has a dedicated result register to reduce interrupt overhead.
• Every analog input can generate an interrupt once the conversion is completed.
• The ADC pads are 5 V tolerant when configured for digital I/O function(s).
6.9 UARTs
The LPC2114/2124 each contain two UARTs. In addition to standard transmit and receive
data lines, the UART1 also provides a full modem control handshake interface.
6.9.1 Features
• 16 B Receive and Transmit FIFOs.
• Register locations conform to 16C550 industry standard.
• Receiver FIFO trigger points at 1 B, 4 B, 8 B, and 14 B
• Built-in fractional baud rate generator covering wide range of baud rates without a
need for external crystals of particular values.
• Transmission FIFO control enables implementation of software (XON/XOFF) flow
control on both UARTs.
• UART1 is equipped with standard modem interface signals. This module also
provides full support for hardware flow control (auto-CTS/RTS).
6.9.2 UART features available in LPC2114/2124/01 only
Compared to previous LPC2000 microcontrollers, UARTs in LPC2114/2124/01 introduce
a fractional baud rate generator for both UARTs, enabling these microcontrollers to
achieve standard baud rates such as 115200 Bd with any crystal frequency above 2 MHz.
In addition, auto-CTS/RTS flow-control functions are fully implemented in hardware.
• Fractional baud rate generator enables standard baud rates such as 115200 Bd to be
achieved with any crystal frequency above 2 MHz.
• Auto-bauding.
• Auto-CTS/RTS flow-control fully implemented in hardware.
6.10 I2C-bus serial I/O controller
The I2C-bus is a bidirectional bus for inter-IC control using only two wires: a serial clock
line (SCL), and a serial data line (SDA). Each device is recognized by a unique address
and can operate as either a receiver-only device (e.g. an LCD driver or a transmitter with
LPC2114_2124
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 7 — 10 June 2011
© NXP B.V. 2011. All rights reserved.
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