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ISP1583 Просмотр технического описания (PDF) - Philips Electronics

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ISP1583 Datasheet PDF : 87 Pages
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Philips Semiconductors
ISP1583
Hi-Speed USB peripheral controller
Table 2: Pin description…continued
Symbol[1] Pin Type[2] Description
MODE0/
DA1[5]
60 I/O
Mode selection input 0 — Selects the read/write strobe
functionality in generic processor mode during power-up:
LOW: for Motorola style; the function of pin 19 is RW_N and
pin 20 is DS_N
HIGH: for 8051 style; the function of pin 19 is RD_N and
pin 20 is WR_N.
Address selection output — Selects the Task File register of
an ATA/ATAPI device during normal operation; see Table 59
bidirectional pad; 10 ns slew-rate control; TTL; 5 V tolerant[6]
VCC(3V3)[3]
61 -
regulator supply voltage (3.3 V ± 0.3 V); this pin supplies the
internal regulator; see Section 8.15
BUS_CONF/ 62 I/O
DA0[5]
Bus configuration input — Selects bus mode during
power-up at:
LOW: split bus mode; multiplexed 8-bit address and data
bus on AD[7:0], separate DMA data bus on DATA[15:0][4]
HIGH: generic processor mode; separate 8-bit address on
AD[7:0], 16-bit processor data bus on DATA[15:0]. DMA is
multiplexed on the processor bus as DATA[15:0].
Address selection output — Selects the Task File register of
an ATA/ATAPI device at normal operation; see Table 59
bidirectional pad; 10 ns slew-rate control; TTL; 5 V tolerant[6]
WAKEUP 63 I
wake-up input; when this pin is at the HIGH level, the chip is
prevented from getting into the suspend state and the chip
wakes up from the suspend state; when not in use, connect
this pin to ground through a 10 kresistor
input pad; TTL; 5 V tolerant[6]
SUSPEND 64 O
suspend state indicator output; used as a power switch control
output for powered-off application or as a resume signal to the
CPU for powered-on application
CMOS output; 8 mA drive
GND
exposed die ground supply; down bonded to the exposed die pad
pad
(heatsink); to be connected to the DGND during PCB layout
[1] Symbol names ending with underscore N (for example, NAME_N) represent active LOW signals.
[2] All outputs and I/O pins can source 4 mA.
[3] Add a decoupling capacitor (0.1 µF) to all the supply pins. For better EMI results, add a 0.01 µF
capacitor in parallel to the 0.1 µF.
[4] The DMA bus is in 3-state until a DMA command (see Section 9.4.1) is executed.
[5] The control signals are not 3-state.
[6] 5 V tolerant when VCC(I/O) = 3.3 V.
9397 750 13461
Product data
Rev. 03 — 12 July 2004
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
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