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ISP1583

Hi-Speed Universal Serial Bus peripheral controller

Philips Electronics 

Philips Semiconductors

ISP1583

Hi-Speed USB peripheral controller

8.14 Power-on reset

The ISP1583 requires a minimum pulse width of 500 µs.

The RESET_N pin can be either connected to VCC(3V3) (using the internal POR

circuit) or externally controlled (by the microcontroller, ASIC, and so on). When

VCC(3V3) is directly connected to the RESET_N pin, the internal pulse width tPORP will

be typically 200 ns.

The power-on reset function can be explained by viewing the dips at t2-t3 and t4-t5

on the VCC(POR) curve (Figure 9).

t0 — The internal POR starts with a HIGH level.

t1 — The detector will see the passing of the trip level and a delay element will add

another tPORP before it drops to LOW.

t2-t3 — The internal POR pulse will be generated whenever VCC(POR) drops below

Vtrip for more than 11 µs.

t4-t5 — The dip is too short (< 11 µs) and the internal POR pulse will not react and

will remain LOW.

VBAT(POR)

Vtrip

t0

t1

t2

t3

t4 t5

t

PORP

t

PORP

PORP(1)

004aaa389

(1) PORP = power-on reset pulse.

Fig 9. POR timing.

Figure 10 shows the availability of the clock with respect to the external POR.

POR

EXTERNAL CLOCK

A

Stable external clock is to be available at A.

Fig 10. Clock with respect to the external POR.

004aaa365

8.15 Power supply

The ISP1583 can be powered by 3.3 V ± 0.3 V, and from 1.65 V to 3.6 V at the

interface. For connection details, see Figure 11.

9397 750 13461

Product data

Rev. 03 — 12 July 2004

© Koninklijke Philips Electronics N.V. 2004. All rights reserved.

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