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ISP1582 Просмотр технического описания (PDF) - Philips Electronics

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ISP1582 Datasheet PDF : 66 Pages
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Philips Semiconductors
ISP1582
Hi-Speed USB peripheral controller
9397 750 13699
Preliminary data
VCC(I/O)
VCC
INT
power off
power off
004aaa469
Fig 13. Interrupt pin status during power off in power-sharing mode.
Table 5: Operation truth table for SoftConnect
ISP1582 operation
Power supply
Bit SOFTCT in
VCC
VCC(I/O) RPU VBUS Mode register
(3.3 V)
Normal bus operation
3.3 V 3.3 V 3.3 V 5 V enabled
Core power is lost
0 V 3.3 V 0 V 0 V not applicable
Table 6: Operation truth table for clock off during suspend
ISP1582 operation
Power supply
Clock off during
VCC
VCC(I/O) RPU VBUS suspend
(3.3 V)
Clock will wake up:
3.3 V 3.3 V 3.3 V 5 V enabled
After resume and
After a bus reset
Core power is lost
0 V 3.3 V 0 V 0 V not applicable
Table 7: Operation truth table for back voltage compliance
ISP1582 operation
Power supply
Bit SOFTCT in
VCC
VCC(I/O) RPU VBUS Mode register
(3.3 V)
Back voltage is not measured in this 3.3 V 3.3 V
mode
3.3 V 5 V enabled
Back voltage is not an issue because 0 V
core power is lost
3.3 V 0 V
0 V not applicable
Table 8: Operation truth table for OTG
ISP1582 operation
VCC
SRP is not applicable
OTG is not possible because VBUS is
not present and so core power is lost
3.3 V
0V
Power supply
OTG register
VCC(I/O) RPU VBUS
(3.3 V)
3.3 V 3.3 V 5 V not applicable
3.3 V 0 V 0 V not applicable
Rev. 03 — 25 August 2004
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
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