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IDT82P2288BB Просмотр технического описания (PDF) - Integrated Device Technology

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IDT82P2288BB
IDT
Integrated Device Technology IDT
IDT82P2288BB Datasheet PDF : 384 Pages
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IDT82P2288
OCTAL T1/E1/J1 LONG HAUL / SHORT HAUL TRANSCEIVER
Name
DS / RD / SCLK
SPIEN
TRST
TMS
TCK
TDI
TDO
VDDDIO
VDDDC
Type Pin No.
Description
Input
N10 DS: Data Strobe (Active Low)
In parallel Motorola mode, this pin is active low.
RD: Read Strobe (Active Low)
In parallel Intel mode, this pin is active low for read operation.
SCLK: Serial Clock
In SPI mode, this pin inputs the timing for the SDO and SDI pins. The signal on the SDO pin is updated on the falling
edge of SCLK, while the signal on the SDI pin is sampled on the rising edge of SCLK.
Input
Input
Input
Input
Input
High-Z
Power
Power
DS / RD / SCLK is a Schmitt-trigger input.
N11 SPIEN: Serial Microprocessor Interface Enable
When this pin is low, the microprocessor interface is in parallel mode.
When this pin is high, the microprocessor interface is in SPI mode.
SPIEN is a Schmitt-trigger input.
JTAG (per IEEE 1149.1)
R13 TRST: Test Reset (Active Low)
A low signal on this pin resets the JTAG test port. This pin is a Schmitt-triggered input with an internal pull-up resis-
tor. It must be connected to the RESET pin or ground when JTAG is not used.
T14 TMS: Test Mode Select
The signal on this pin controls the JTAG test performance and is sampled on the rising edge of TCK. This pin is a
Schmitt-triggered input with an internal pull-up resistor.
T15 TCK: Test Clock
The clock for the JTAG test is input on this pin. TDI and TMS are sampled on the rising edge of TCK and TDO is
clocked out of the device on the falling edge of TCK. This pin is a Schmitt-triggered input with an internal pull-up
resistor.
T13 TDI: Test Input
The test data is sampled at this pin on the rising edge of TCK. This pin is a Schmitt-triggered input with an internal
pull-up resistor.
R14 TDO: Test Output
The test data are output on this pin. It is updated on the falling edge of TCK. This pin is High-Z except during the
process of data scanning.
Power & Ground
F5, G5, VDDDIO: 3.3 V I/O Power Supply
H5, J5,
J12, K5,
K12, L12,
M12
H6, H7, VDDDC: 1.8 V Digital Core Power Supply
H8, J6,
J7, J8,
J9, J10,
J11, K6,
K7,
K8, K9,
K10,
K11,
L6, L7,
L8, L9,
L10,
L11
Pin Description
9
March 22, 2004

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