IDT82P2281 Просмотр технического описания (PDF) - Integrated Device Technology
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IDT82P2281 Datasheet PDF : 375 Pages
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IDT82P2281
SINGLE T1/E1/J1 LONG HAUL / SHORT HAUL TRANSCEIVER
Name
TRST
TMS
TCK
TDI
TDO
VDDDIO[0]
VDDDIO[1]
VDDDIO[2]
GNDDIO[0]
GNDDIO[1]
GNDDIO[2]
VDDDC[0]
VDDDC[1]
VDDDC[2]
VDDDC[3]
GNDDC[0]
GNDDC[1]
GNDDC[2]
GNDDC[3]
VDDAR
GNDAR
VDDAT
GNDAT
VDDAX
GNDAX
VDDAP
GNDAP
VDDAB
GNDAB
IC
Type
Input
Input
Input
Input
High-Z
Power
Ground
Power
Ground
Power
Ground
Power
Ground
Power
Ground
Power
Ground
Power
Ground
-
Pin No.
Description
77 TRST: Test Reset (Active Low)
A low signal on this pin resets the JTAG test port. This pin is a Schmitt-triggered input with an internal pull-up resistor. It
must be connected to the RESET pin or ground when JTAG is not used.
80 TMS: Test Mode Select
The signal on this pin controls the JTAG test performance and is sampled on the rising edge of TCK. This pin is a
Schmitt-triggered input with an internal pull-up resistor.
78 TCK: Test Clock
The clock for the JTAG test is input on this pin. TDI and TMS are sampled on the rising edge of TCK and TDO is clocked
out of the device on the falling edge of TCK. This pin is a Schmitt-triggered input with an internal pull-up resistor.
79 TDI: Test Input
The test data is sampled at this pin on the rising edge of TCK. This pin has an internal pull-up resistor. This pin is a
Schmitt-triggered input with an internal pull-up resistor.
76 TDO: Test Output
The test data are output on this pin. It is updated on the falling edge of TCK. This pin is High-Z except during the process
of data scanning.
Power & Ground
73 VDDDIO[2:0]: 3.3 V I/O Power Supply
30
52
69 GNDDIO[2:0]: Digital Pad Ground
34
48
71 VDDDC[3:0]: 1.8 V Digital Core Power Supply
32
50
3
68 GNDDC[3:0]: Digital Core Ground
35
47
4
16 VDDAR: 3.3 V Power Supply for Receiver
19 GNDAR: Analog Ground for Receiver
15 VDDAT: 3.3 V Power Supply for Transmitter
14 GNDAT: Analog Ground for Transmitter
10 VDDAX: 3.3 V Power Supply for Transmit Driver
13 GNDAX: Analog Ground for Transmitter Driver
6 VDDAP: 3.3 V Power Analog PLL
5 GNDAP: Analog Ground PLL
8 VDDAB: 3.3 V Power Analog Bias
7 GNDAB: Analog Ground Bias
TEST
21 IC: Internal Connected
40 These pins are for IDT use only and should be connected to ground.
62
63
Pin Description
8
October 7, 2003
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