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DS2751E Просмотр технического описания (PDF) - Maxim Integrated

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Компоненты Описание
производитель
DS2751E
MaximIC
Maxim Integrated MaximIC
DS2751E Datasheet PDF : 19 Pages
First Prev 11 12 13 14 15 16 17 18 19
Table 3. MEMORY MAP
ADDRESS (HEX)
00
01
02 to 06
07
08
09 to 0B
0C
0D
DESCRIPTION
Reserved
Status Register
Reserved
EEPROM Register
Special Feature Register
Reserved
Voltage Register MSB
Voltage Register LSB
0E
Current Register MSB
0F
Current Register LSB
10
11
12 to 17
18
19
1A to 1F
20 to 2F
30 to 3F
40 to 7F
80 to 8F
90 to FF
Accumulated Current Register MSB
Accumulated Current Register LSB
Reserved
Temperature Register MSB
Temperature Register LSB
Reserved
EEPROM, block 0
EEPROM, block 1
Reserved
SRAM
Reserved
*Each EEPROM block is read/write until locked by the LOCK command, after which it is read-only.
DS2751
READ/WRITE
R
R/W
R/W
R
R
R
R
R/W
R/W
R
R
R/W*
R/W*
R/W
STATUS REGISTER
The default values for the Status Register bits are stored in lockable EEPROM in the corresponding bits
of address 31h. A Recall Data command for EEPROM block 1 recalls the default values into the Status
Register bits. The format of the Status Register is shown in Figure 8. The function of each bit is described
in detail in the following paragraphs.
Figure 8. STATUS REGISTER FORMAT
Address 01
bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0
X
X PMOD RNAOP UVEN X
X
X
PMOD—Sleep Mode Enable. A value of 1 in this bit enables the DS2751 to enter sleep mode when the
DQ line goes low for greater than tSLEEP. A value of 0 disables the DS2751 from entering the sleep mode.
This bit is read-only. The desired default value should be set in bit 5 of address 31h. The factory default
is 0.
RNAOP—Read Net Address Opcode. A value of 0 in this bit sets the opcode for the Read Net Address
command to 33h, while a 1 sets the opcode to 39h. This bit is read-only. The desired default value should
be set in bit 4 of address 31h. The factory default is 0.
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