DS2751E Просмотр технического описания (PDF) - Maxim Integrated
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DS2751E Datasheet PDF : 19 Pages
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DS2751
UVEN—Undervoltage Sleep Enable. A value of 1 in UVEN along with a value of 1 in PMOD enables
the DS2751 to enter sleep mode when the voltage on VIN drops below undervoltage threshold VUV for
tUVD (cell depletion). A value of 0 disables the DS2751 from entering the sleep mode due to undervoltage
events. This bit is read-only. The desired default value should be set in bit 3 of address 31h. The factory
default is 0.
X—Reserved Bits.
EEPROM REGISTER
The format of the EEPROM Register is shown in Figure 9. The function of each bit is described in detail
in the following paragraphs.
Figure 9. EEPROM REGISTER FORMAT
Address 07
bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0
EEC LOCK X
X
X
X
BL1 BL0
EEC—EEPROM Copy Flag. A 1 in this read-only bit indicates that a Copy Data command is in progress.
While this bit is high, writes to EEPROM addresses are ignored. A 0 in this bit indicates that data can be
written to unlocked EEPROM blocks.
LOCK—EEPROM Lock Enable. When this bit is 0, the Lock command is ignored. Writing a 1 to this bit
enables the Lock command. After the Lock command is executed, the LOCK bit is reset to 0. The factory
default is 0.
BL1—EEPROM Block 1 Lock Flag. A 1 in this read-only bit indicates that EEPROM block 1 (addresses
30 to 3F) is locked (read-only), while a 0 indicates block 1 is unlocked (read/write).
BL0—EEPROM Block 0 Lock Flag. A 1 in this read-only bit indicates that EEPROM block 0 (addresses
20 to 2F) is locked (read-only), while a 0 indicates block 0 is unlocked (read/write).
X—Reserved Bits.
SPECIAL FEATURE REGISTER
The format of the Special Feature Register is shown in Figure 10. The function of each bit is described in
detail in the following paragraphs.
Figure 10. SPECIAL FEATURE REGISTER FORMAT
Address 08
bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0
POR PIO
X
X
X
X
X
X
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