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DS2151 Просмотр технического описания (PDF) - Dallas Semiconductor -> Maxim Integrated

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Компоненты Описание
производитель
DS2151
Dallas
Dallas Semiconductor -> Maxim Integrated Dallas
DS2151 Datasheet PDF : 51 Pages
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DS2151Q
SR1: STATUS REGISTER 1 (Address=20 Hex)
(MSB)
(LSB)
LUP
LDN
LOTC
RSLIP
RBL
RYEL
RCL
RLOS
SYMBOL POSITION NAME AND DESCRIPTION
LUP SR1.7 Loop Up Code Detected. Set when the repeating ...00001...
loop up code is being received.
LDN
SR1.6
Loop Down Code Detected. Set when the repeating ...001...
loop down code is being received.
LOTC
SR1.5
Loss of Transmit Clock. Set when the TCLK pin has not
transitioned for one channel time (or 5.2 us). Will force pin 16
high if enabled via CCR1.6. Based on RCLK.
RSLIP
SR1.4
Receive Elastic Store Slip Occurrence. Set when the receive
elastic store has either repeated or deleted a frame.
RBL SR1.3 Receive Blue Alarm. Set when a blue alarm is received at
RTIP and RRING. See note below.
RYEL
SR1.2
Receive Yellow Alarm. Set when a yellow alarm is received at
RTIP and RRING.
RCL SR1.1 Receive Carrier Loss. Set when 192 consecutive 0s have been
detected at RTIP and RRING.
RLOS
SR1.0
Receive Loss of Sync. Set when the device is not synchronized
to the receive T1 stream.
DS2151Q ALARM SET AND CLEAR CRITERIA Table 4-2
ALARM
SET CRITERIA
CLEAR CRITERIA
Blue Alarm (AIS) (see note 1 when over a 3 ms window, five when over a 3 ms window, six or
below)
or less 0s are received
more 0s are received
Yellow Alarm
when bit 2 of 256 consecutive when bit 2 of 256 consecutive
1. D4 bit 2 mode (RCR2.2=0) channels is set to 0 for at least channels is set to 0 for less than
254 occurrences
254 occurrences
2. D4 12th F-bit mode
(RCR2.2=1; this mode is also when the 12th framing bit is set when the 12th framing bit is set
referred to as the “Japanese to 1 for two consecutive to 0 for two consecutive
Yellow Alarm”)
occurrences
occurrences
3. ESF Mode
Red Alarm (RCL) (this alarm is
also referred to as Loss of Signal)
when 16 consecutive patterns of
00FF hex appear in the FDL
when 192 consecutive 0s are
received
when 14 or less patterns of 00FF
hex out of 16 possible appear in
the FDL
when 14 or more 1s out of 112
possible bit positions are
received starting with the first 1
received
19 of 51

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