UPD70741GC-25-8EU Просмотр технического описания (PDF) - NEC => Renesas Technology
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UPD70741GC-25-8EU Datasheet PDF : 112 Pages
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µPD70741
3. CPU FUNCTIONS
The CPU has functions equivalent to those of the V810 microprocessor, designed for built-in control. It offers bit
string instructions, floating-point instructions, and quick real-time response.
3.1 Features
The features of the CPU are:
• High-performance 32-bit RISC microprocessor
• Built-in 1-Kbyte cache memory
• Pipeline structure of 1-clock pitch
• 16-bit data bus
• 32-bit general-purpose registers: 32
• 4-Gbyte linear address space
• Instructions ideal for various application fields
• Floating-point operation instructions (conforming to the IEEE754 data format)
• Bit string instructions
• High-speed interrupt response
• Debug support functions
3.2 Address Space
The V821 supports internal memory and I/O spaces of 4G bytes each. The V821 outputs 24-bit addresses to
memory and I/O, such that the addresses range from 0 to 224 - 1.
In byte data, bit 0 is defined as the LSB (Least Significant Bit) and bit 7 as the MSB (Most Significant Bit). In multiple-
byte data, bit 0 of the byte data in the lower address is defined as the LSB and bit 7 of the byte data in the upper
address as the MSB, unless noted otherwise.
In the case of the V821, 2-byte data is referred to as halfword data, and 4-byte data as word data. In this data
sheet, in representations of multiple-byte memory and I/O data, the right address corresponds to the lower address
and the left address to the upper address, as shown below.
Byte of address A
7
0
A (address)
Halfword of address A
15
87
0
A+1
A (address)
31
24 23
16 15
87
0
Word of address A/short real
A+3
A+2
A+1
A (address)
14
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