DatasheetQ Logo
Electronic component search and free download site. Transistors,MosFET ,Diode,Integrated circuits

UPD70741GC-25-8EU Просмотр технического описания (PDF) - NEC => Renesas Technology

Номер в каталоге
Компоненты Описание
производитель
UPD70741GC-25-8EU
NEC
NEC => Renesas Technology NEC
UPD70741GC-25-8EU Datasheet PDF : 112 Pages
First Prev 11 12 13 14 15 16 17 18 19 20 Next Last
µPD70741
2. INTERNAL UNITS
2.1 Bus Interface Unit (BIU)
Controls the pins of the address bus, data bus, and control bus. A bus cycle activated by the CPU or DMAC is
controlled via the WCU, DRAMC, and ROMC.
2.2 Wait Control Unit (WCU)
Manages the four blocks corresponding to four chip select signals (CS0-CS3).
This block generates chip select signals, performs wait control, and selects a bus cycle type.
2.3 DRAM Controller (DRAMC)
Generates the RAS, UCAS, and LCAS signals (2CAS control) and controls access to DRAM.
This block supports DRAM high-speed page mode. Access to DRAM can be of either of two types, each having
a different cycle, normal access (off-page) or high-speed page access (on-page).
2.4 ROM Controller (ROMC)
Supports access to ROM supporting a page access function.
Performs address comparison relative to the previous bus cycle and performs wait control for normal access (off-
page)/page access (on-page). It supports page widths of 8-64 bytes.
2.5 Interrupt Controller
Handles maskable interrupt requests (INTP00-INTP03, INTP10-INTP13) from both the built-in and external
peripheral hardware. Priorities can be specified for these interrupt requests, in units of four groups. It can apply
multiple handling control to the interrupt sources.
2.6 DMA Controller (DMAC)
Transfers data between memory and I/O, as instructed by the CPU.
There are two address modes, fly-by (1-cycle) transfer and 2-cycle transfer. There are three bus modes, single
transfer, single-step transfer, and block transfer.
2.7 Serial Interfaces (UART/CSI)
As serial interfaces, the V821 features an asynchronous serial interface (UART) and a synchronous serial interface
(CSI), one channel being assigned to each.
The UART transfers data via pins TXD and RXD.
The CSI transfers data via pins SO, SI, and SCLK.
Either the baud rate generator or the system clock can be selected as the serial clock source.
2.8 Real-Time Pulse Unit (RPU)
This block incorporates a 16-bit timer/event counter and a 16-bit interval timer. It can calculate pulse intervals
and frequencies and output programmable pulses.
12

Share Link: 

datasheetq.com  [ Privacy Policy ]Request Datasheet ] [ Contact Us ]