EN5394QI Просмотр технического описания (PDF) - Altera Corporation
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EN5394QI
Altera Corporation
EN5394QI Datasheet PDF : 19 Pages
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the device must not be more than shown in
Figure 8. See the section regarding exposed
metal on bottom of package. As with any
switch-mode DC/DC converter, try not to run
sensitive signal or control lines underneath the
converter package on other layers.
Recommendation 7: The VOUT sense point
should be just after the last output filter
EN5394QI
capacitor. Keep the sense trace short in order
to avoid noise coupling into the node.
Recommendation 8: Keep RA, CA, and RB
close to the VFB pin (see Figures 4 and 8).
The VFB pin is a high-impedance, sensitive
node. Keep the trace to this pin as short as
possible. Whenever possible, connect RB
directly to the AGND pin instead of going
through
the
GND
plane.
Thermal Considerations
The Altera Enpirion EN5394QI DC-DC
converter is packaged in an 11 x 8 x 1.85mm
68-pin QFN package. The QFN package is
constructed with copper lead frames that have
exposed thermal pads. The recommended
maximum junction temperature for continuous
operation is 125°C. Continuous operation
above 125°C will reduce long-term reliability.
The device has a thermal overload protection
circuit designed to shut it off at an approximate
junction temperature value of 150°C.
The silicon is mounted on a copper thermal
pad that is exposed at the bottom of the
package. There is an additional thermal pad in
the corner of the package which provides
another path for heat flow out from the
package. The thermal resistance from the
silicon to the exposed thermal pads is very low.
In order to take advantage of this low
resistance, the exposed thermal pads on the
package should be soldered directly on to a
copper ground pad on layer 1 of the PCB. The
PCB then acts as a heat sink. In order for the
PCB to be an effective heat sink, the device
thermal pads should be coupled to copper
ground planes using multiple vias (refer to
Layout Recommendations section).
The junction temperature, TJ, is calculated from
the ambient temperature, TA, the device power
dissipation, PD, and the device junction-to-
ambient thermal resistance, θJA in °C/W:
TJ = TA + (PD)(θJA)
The junction temperature, TJ, can also be
expressed in terms of the device case
temperature, TC, and the device junction-to-
case thermal resistance, θJC in °C/W, as
follows:
TJ = TC + (PD)(θJC)
The device case temperature, TC, is the
temperature at the center of the larger exposed
thermal pad at the bottom of the package.
The device junction-to-ambient and junction-to-
case thermal resistances, θJA and θJC, are
shown in the Thermal Characteristics table.
The θJC is a function of the device and the 68-
pin QFN package design. The θJA is a function
of θJC and the user’s system design
parameters that include the thermal
effectiveness of the customer PCB and airflow.
The θJA value shown in the Thermal
Characteristics table is for free convection with
the device heat sunk (through the thermal
pads) to a copper plated four-layer PC board
with a full ground and a full power plane
following JEDEC EIJ/JESD 51 Standards. The
θJA can be reduced with the use of forced air
convection. Because of the strong dependence
on the thermal effectiveness of the PCB and
the system design, the actual θJA value will be
a function of the specific application.
When operating on a board with the θJA of the
thermal characteristics table, some thermal
derating is needed to operate all the way up to
maximum output current.
Figures 9 and 10 show, for a given input
voltage, the maximum output current curves as
a function of ambient temperature and output
voltage. These curves in figures have been
plotted assuming a maximum 125 °C limitation
on the junction temperature at a specific θJA for
the PCB.
03738
16
October 11, 2013
www.altera.com/enpirion
Rev E
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