LRI512 Просмотр технического описания (PDF) - STMicroelectronics

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LRI512

Memory TAG IC 512 bit High Endurance EEPROM 13.56MHz, ISO 15693 Standard Compliant with E.A.S.

STMicroelectronics 

LRI512

WRITE SINGLE BLOCK

Command Code = 0x21

When receiving the Write Single Block Command,

the LRI512 writes the requested block with the

data contained in the Request, and reports the

success of the operation in the Response. The

Option_Flag is not supported.

During the write cycle, tW, no modulation (neither

100% nor 10%) shall occur, otherwise the LRI512

may program the data incorrectly in the memory.

The tW delay is a multiple of t1nominal.

Request parameter (Table 28):

– UID (Optional)

– Block Number

– Data

Response parameter (Table 29):

– No parameter. The response is sent back af-

ter the write cycle

Response parameter (Table 30):

– Error Code as Error_Flag is set

Table 28. Write Single Block Request Format

Request

SOF

Request

Flags

Write Single

Block

UID

8 bits

0x21

64 bits

Block

Number

8 bits

Data

32 bits

CRC16

16bits

Request

EOF

Table 29. Write Single Block Response Format when Error Flag is NOT Set

Response SOF

Response_Flags

CRC16

8 bits

16 bits

Response EOF

Table 30. Write Single Block Response Format when Error Flag is Set

Response SOF Response_Flags

Error Code

CRC16

8 bits

8 bits

16 bits

Response EOF

Figure 35. WRITE Single Block Frame Exchange between VCD and LRI512

VCD

LRI512

SOF

Write Single

Block Request

EOF

t1

SOF

Write Single

Block Response

EOF

Write sequence when error

LRI512

tw

t1

SOF

Write Single

Block Response

EOF

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