LRI512 Просмотр технического описания (PDF) - STMicroelectronics

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LRI512

Memory TAG IC 512 bit High Endurance EEPROM 13.56MHz, ISO 15693 Standard Compliant with E.A.S.

STMicroelectronics 

LRI512

LOCK BLOCK

Command Code = 0x22

When receiving the Lock Block Command, the

LRI512 lock permanently the requested block. The

Option_Flag is not supported.

During the write cycle tW, no modulation (never

100% nor 10%) shall occur. If so, the LRI512 may

not lock correctly the memory block. The tW delay

is a multiple of t1nominal.

Request parameter (Table 31):

– (Optional) UID

– Block Number

Response parameter (Table 32):

– No parameter.

Response parameter (Table 33):

– Error Code as Error_Flag is set

Table 31. Lock Single Block Request Format

Request

SOF

Request

Flags

Lock Block

UID

8 bits

0x22

64 bits

Block

Number

8 bits

Table 32. Lock Block Response Format when Error Flag is NOT Set

Response SOF

Response_Flags

CRC16

8 bits

16 bits

Table 33. Lock Block Response Format when Error Flag is Set

Response SOF Response_Flags

Error Code

CRC16

8 bits

8 bits

16 bits

Figure 36. LOCK Block Frame Exchange between VCD and LRI512

CRC16

16 bits

Request

EOF

Response EOF

Response EOF

VCD

LRI512

LRI512

SOF

Lock Block EOF

Request

SOF

t1

Lock Block

Response

EOF Lock sequence when error

SOF

Lock Block EOF

tw

t1

Response

AI06834

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