LRI512 Просмотр технического описания (PDF) - STMicroelectronics

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LRI512

Memory TAG IC 512 bit High Endurance EEPROM 13.56MHz, ISO 15693 Standard Compliant with E.A.S.

STMicroelectronics 

Figure 31. Principle of Comparison between the Mask, Slot Number and UID

Mask value received in the Inventory command

The Mask value less the padding 0s is loaded

into the Tag comparator

The Slot counter is calculated

Nb_slots_flags = 0 (16 slots), Slot Counter is 4 bits

MSB

LSB

0000 0100 1100 1111 b 16 bits

MSB

LSB

100 1100 1111 b 11 bits

MSB LSB

xxxx

4 bits

The Slot counter is concatened to the Mask value

Nb_slots_flags = 0

MSB

LSB

xxxx 100 1100 1111 b 15 bits

LRI512

The concatenated result is compared with

the least significant bits of the Tag UID.

b63

UID

b0

xxxx xxxx ..... xxxx xxxx x xxx xxxx xxxx xxxx b

64 bits

Bits ignored

Compare

AI06682

The AFI field shall be present if the AFI_flag is set.

The pulse shall be generated according to the def-

inition of the EOF in ISO/IEC 15693-2.

The first slot starts immediately after the reception

of the Request EOF.

To switch to the next slot, the VCD sends an EOF.

The following rules and restrictions apply:

– if no LRI512 answer is detected, the VCD may

switch to the next slot by sending an EOF

– if one or more LRI512 answers are detected, the

VCD shall wait until the complete frame has

been received before sending an EOF for

switching to the next slot.

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