LRI512 Просмотр технического описания (PDF) - STMicroelectronics

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LRI512

Memory TAG IC 512 bit High Endurance EEPROM 13.56MHz, ISO 15693 Standard Compliant with E.A.S.

STMicroelectronics 

LRI512

ANTI-COLLISION

The purpose of the anti-collision sequence is to in-

ventory the LRI512s present in the VCD field by

their unique ID (UID).

The VCD is the master of the communication with

one or multiple LRI512s. It initiates LRI512 com-

munication by issuing the Inventory Request.

The LRI512 sends its Response in the slot deter-

mined, or might not respond.

Request parameters

When issuing the Inventory Command, the VCD

shall:

– set the Nb_slots_flag to the desired setting,

– add after the Command Field the Mask Length

and the Mask Value,

– The Mask Length is the number of significant

bits of the Mask Value.

– The Mask Value is contained in an integer num-

ber of bytes. The Mask Length indicates the

number of significant bits. LSB shall be transmit-

ted first.

– If the Mask Length is not a multiple of 8 bits, the

Mask Value MSB shall be padded with the re-

quired number of null bits (set to 0) so that the

Mask Value is contained in an integer number of

bytes.

– The next field starts on the next byte boundary.

Table 17. Inventory Request Format

MSB

SOF

Request

Flags

Command Optional AFI

8 bits

8 bits

8 bits

Mask

Length

8 bits

Mask Value

0 to 8 bytes

CRC

16 bits

LSB

EOF

In the example of the Table 18 and Figure 31, the

Mask Length is 11 bits. The Mask Value MSB is

padded with five bits set to 0. The 11 bits Mask

plus the current slot number is compared to the

UID.

Table 18. Example of the Padding of a 11 bits

Mask Value

(b15) MSB

LSB (b0)

0000 0

100 1100 1111

Pad

11 bits Mask Value

22/54

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