HMP8156 Просмотр технического описания (PDF) - Intersil

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производитель

HMP8156

NTSC/PAL Encoder

Intersil 

HMP8156

Typical Performance Curves (Continued)

FIGURE 29. H SYNC JITTER IN A FRAME (PAL)

FIGURE 30. SCH PHASE MEASUREMENT

Applications Information

PAL Teletext

Teletext encoding may be implemented on any line by driv-

ing the pixel inputs with appropriate data. For YCbCr input

modes, Cb and Cr should equal 128 to disable the color

information. For RGB input modes, R, G, and B should

always have the same value to disable the color information.

Vertical blanking must be negated on the first scan line con-

taining teletext information. If there are unused scan lines

between teletext data and active video, BLANK must remain

off and the pixel inputs should be set to the black level.

Video Test Signals

Video test signals may be generated by driving the pixel

inputs with appropriate data. Most of the video test signals

require using YCbCr pixel data.

Vertical blanking must be negated on the first scan line con-

taining video test signals. If there are unused scan lines

between test signal data and active video, BLANK must

remain off and the pixel inputs should be set to the black level.

PCB Considerations

A PCB board with a minimum of 4 layers is recommended, with

layers 1 and 4 (top and bottom) for signals and layers 2 and 3

for power and ground. The PCB layout should implement the

lowest possible noise on the power and ground planes by pro-

viding excellent decoupling. PCB trace lengths between groups

of VAA and GND pins should be as short as possible.

Component Placement

The optimum layout places the HMP8156 at the edge of the

PCB and as close as possible to the video output connector.

External components should be positioned as close as pos-

sible to the appropriate pin, ideally such that traces can be

connected point to point. Chip capacitors are recommended

where possible, with radial lead ceramic capacitors the sec-

ond-best choice.

Traces containing digital signals should not be routed over,

under, or adjacent to the analog output traces to minimize

crosstalk. If this is not possible, coupling can be minimized

by routing the digital signals at a 90 degree angle to the ana-

log signals. The analog output traces should also not overlay

the HMP8156 and VCC power planes to maximize high-fre-

quency power supply rejection.

Power and Ground Planes

A common ground plane for all devices, including the

HMP8156, is recommended. However, placing the encoder

on an electrically connected GND peninsula reduces noise

levels. All GND pins on the HMP8156 must be connected to

the ground plane. Typical power and ground planes are

shown in Figure 31.

The HMP8156 should have its own power plane that is iso-

lated from the common power plane of the board, with a gap

between the two power planes of at least 1/8 inch. All VAA

pins of the HMP8156 must be connected to this HMP8156

power plane.

The HMP8156 power plane should be connected to the

board’s normal VCC power plane at a single point though a

low-resistance ferrite bead, such as a Ferroxcube 5659065-

3B, Fair-Rite 2743001111, or TDK BF45-4001. The ferrite

bead provides resistance to switching currents, improving the

performance of HMP8156. A single, large capacitor should

also be used between the HMP8156 power plane and the

ground plane to control low-frequency power supply ripple.

30

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