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HMP8156 Просмотр технического описания (PDF) - Intersil

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производитель
HMP8156
Intersil
Intersil Intersil
HMP8156 Datasheet PDF : 33 Pages
First Prev 31 32 33
HMP8156
For proper operation, power supply decoupling is required. It
should be done using a 0.1µF ceramic capacitor in parallel
with a 0.01µF chip capacitor for each group of VAA pins to
ground. These capacitors should be located as close to the
VAA and GND pins as possible, using short, wide traces.
If a separate linear regulator is used to provide power to the
HMP8156 power plane, the power-up sequence should be
designed to ensure latchup will not occur. A separate linear reg-
ulator is recommended if the power supply noise on the VAA
pins exceeds 200mV. About 10% of the noise (that is less than
1MHz) on the VAA pins will couple onto the analog outputs.
FERRITE
BEAD
BULK AREA
CAPACITOR
VCC
8156
LP
FILTERS
ANALOG
CONN.
GND
VAA
PCB
FIGURE 31A. VCC AND VAA PLANES
8156
LP
FILTERS
ANALOG
CONN.
PCB
FIGURE 31B. COMMON GROUND PLANE
FIGURE 31. EXAMPLE POWER AND GROUND PLANES
31

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