HMP8156 Просмотр технического описания (PDF) - Intersil

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Компоненты Описание

производитель

HMP8156

NTSC/PAL Encoder

Intersil 

HMP8156

Electrical Specifications

PARAMETER

VAA = +5V ±5%, RSET = 124Ω, VREF_IN = 1.225V, Unless otherwise specified (Continued)

TEST CONDITION

MIN

TYP

MAX UNITS

Output Current

-

-

34.8

mA

Output Impedance

-

100K

-

Ohms

Output Capacitance

Output Compliance Range

IOUT = 0mA, CLK = 13.5MHz

-

25

-

pF

0

-

1.4

V

Video Level Error

Internal Voltage Reference

External Voltage Reference

Note 2

-

-

±±±10

%

±5

%

DAC to DAC Matching

-

-

5

%

VREF Output Voltage

Pin not driven, using internal reference

1.13

1.225

1.32

V

VREF Output Current

Pin not driven, using internal reference

-50

-

50

µA

VREF Input Voltage

Pin connected to external reference shown in 1.112 1.235 1.358

V

Figure 32

VREF Input Current

Pin connected to external reference shown in -500

-

500

µA

Figure 32

AC PARAMETERS, ANALOG OUTPUTS

Differential Gain Error

Differential Phase Error

Using analog output filter shown in Figure

-

1

-

%

33A.

-

1

-

Degree

SNR (Weighted)

-

70

-

dB

Hue Accuracy

-

2

-

Degree

Color Saturation Accuracy

-

2

-

%

Luminance Nonlinearity

-

1

-

%

Residual Subcarrier

-

-60

-

dB

SCH Phase

SCH Phase Reset enabled

-1.5

0

1.5 Degree

Analog Output Skew, TASK

Analog Output Delay, TAD

DAC-DAC Crosstalk

-

-

5

ns

-

-

12

ns

-

-60

-

dB

Glitch Energy

Using analog output filter shown in Figure

-

35

-

pV-s

33A. Includes clock and data feedthrough

AC PARAMETERS, PIXEL INTERFACE - INPUTS

Pixel Setup Time, TS

Pixel Hold Time, TH

Control Setup Time, TS

Control Hold Time, TH

CLK Frequency

6

-

-

ns

0

-

-

ns

6

-

-

ns

0

-

-

ns

-

-

14.75 MHz

CLK High Time, CLKH

CLK Low Time, CLKL

CLK2 Frequency

27.1

-

40.7

ns

27.1

-

40.7

ns

-

-

29.5 MHz

25

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