S-24C32C Просмотр технического описания (PDF) - Seiko Instruments Inc

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S-24C32C

2-WIRE SERIAL E2PROM

Seiko Instruments Inc 

Rev.4.0_02_H

2-WIRE SERIAL E2PROM

S-24C32C/64C

6. Write

6. 1 Byte write

When the master sends a 7-bit device address and a 1-bit read / write instruction code set to “0”, following a start

condition, the S-24C32C/64C acknowledges it. The S-24C32C/64C then receives a upper 8-bit word address and

responds with an acknowledge. And the S-24C32C/64C receives a lower 8-bit word address and responds with

an acknowledge. After the S-24C32C/64C receives 8-bit write data and responds with an acknowledge, it receives

a stop condition and that initiates the write cycle at the addressed memory.

During the write cycle all operations are forbidden and no acknowledge is generated.

S

W

T

R

A

I

R

DEVICE

T

UPPER

T

ADDRESS E

WORD ADDRESS

LOWER

WORD ADDRESS

S

T

O

DATA

P

SDA LINE

1 0 1 0 A2 A1 A0 0 X X X W12 W11 W10 W9 W8 W7 W6 W5 W4 W3 W2 W1 W0 D7 D6 D5 D4 D3 D2 D1 D0

M

LR A

A

A

A

S

S/ C

B

BW K

C

K

C

K

C

K

Remark In the S-24C32C, W12 = Don’t care.

Figure 14 Byte Write

13

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