ADSP-TS101S(RevA) Просмотр технического описания (PDF) - Analog Devices
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ADSP-TS101S Datasheet PDF : 44 Pages
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ADSP-TS101S
Table 9. Pin Definitions—JTAG Port (continued)
Signal
TDO
TMS2
TRST2
Type
O/T
I (pu3)
I/A (pu3)
Term
nc1
nc1
au
Description
Test Data Output (JTAG). A serial data output of the scan path.
Test Mode Select (JTAG). Used to control the test state machine.
Test Reset (JTAG). Resets the test state machine. TRST must be asserted or
pulsed low after power-up for proper device operation. For more information,
see Reset and Booting on Page 8.
Type column symbols: A = Asynchronous; G = Ground; I = Input; O = Output; o/d = Open drain output; P = Power supply;
pd = Internal pull-down approximately 100 kΩ; pu = Internal pull-up approximately 100 kΩ; T = Three-state
Term (for termination) column symbols: epd = External pull-down approximately 10 kΩ to VSS; epu = External pull-up approximately 10 kΩ to VDD-IO
nc = Not connected; au = Always used.
1 See the reference on Page 10 to the JTAG emulation technical reference EE-68.
2 The internal pull-up may not be sufficient. A stronger pull-up may be necessary.
3 See ELECTRICAL CHARACTERISTICS on Page 19 for maximum and minimum current consumption for pull-up and pull-down resistances.
Table 10. Pin Definitions—Flags, Interrupts, and Timer
Signal
Type
Term Description
FLAG3–01
IRQ3–03
TMR0E1
I/O/A
nc
(pd2)
I/A (pu2) nc
O (pd2) au
FLAG pins. Bidirectional input/output pins can be used as program condi-
tions. Each pin can be configured individually for input or for output.
FLAG3–0 are inputs after power-up and reset.
Interrupt Request. When asserted, the DSP generates an interrupt. Each of
the IRQ3–0 pins can be independently set for edge triggered or level sensitive
operation. After reset, these pins are disabled unless the IRQ3–0 strap option
is initialized for booting.
Timer 0 expires. This output pulses for four SCLK cycles whenever timer 0
expires. At reset this is a strap pin. For additional information, see Table 16
on Page 18.
Type column symbols: A = Asynchronous; G = Ground; I = Input; O = Output; o/d = Open drain output; P = Power supply;
pd = Internal pull-down approximately 100 kΩ; pu = Internal pull-up approximately 100 kΩ; T = Three-state
Term (for termination) column symbols: epd = External pull-down approximately 10 kΩ to VSS; epu = External pull-up approximately 10 kΩ to VDD-IO
nc = Not connected; au = Always used.
1 The internal pull-down may not be sufficient. A stronger pull-down may be necessary.
2 See ELECTRICAL CHARACTERISTICS on Page 19 for maximum and minimum current consumption for pull-up and pull-down resistances.
3 The internal pull-up may not be sufficient. A stronger pull-up may be necessary.
Table 11. Pin Definitions—Link Ports
Signal
Type
Term Description
L0DAT7–01
I/O
nc Link0 Data 7–0
L1DAT7–01
I/O
nc Link1 Data 7–0
L2DAT7–01
I/O
nc Link2 Data 7–0
L3DAT7–01
I/O
nc Link3 Data 7–0
L0CLKOUT
O
nc Link0 Clock/Acknowledge Output
L1CLKOUT
O
nc Link1 Clock/Acknowledge Output
L2CLKOUT
O
nc Link2 Clock/Acknowledge Output
L3CLKOUT
O
nc Link3 Clock/Acknowledge Output
L0CLKIN
I/A
nc Link0 Clock/Acknowledge Input
L1CLKIN
I/A
nc Link1 Clock/Acknowledge Input
L2CLKIN
I/A
nc Link2 Clock/Acknowledge Input
L3CLKIN
I/A
nc Link3 Clock/Acknowledge Input
L0DIR
O
nc Link0 Direction. (0 = input, 1 = output)
Type column symbols: A = Asynchronous; G = Ground; I = Input; O = Output; o/d = Open drain output; P = Power supply;
pd = Internal pull-down approximately 100 kΩ; pu = Internal pull-up approximately 100 kΩ; T = Three-state
Term (for termination) column symbols: epd = External pull-down approximately 10 kΩ to VSS; epu = External pull-up approximately 10 kΩ to VDD-IO
nc = Not connected; au = Always used.
–16–
REV. A
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