ADSP-BF539F(RevA) Просмотр технического описания (PDF) - Analog Devices

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Компоненты Описание

производитель

ADSP-BF539F
(Rev.:RevA)

Blackfin Embedded Processor

Analog Devices 

ADSP-BF539/ADSP-BF539F

TABLE OF CONTENTS

General Description ................................................. 3

Low Power Architecture ......................................... 3

Automotive Products ............................................. 3

System Integration ................................................ 3

ADSP-BF539/ADSP-BF539F Processor Peripherals ....... 3

Blackfin Processor Core .......................................... 4

Memory Architecture ............................................ 4

DMA Controllers .................................................. 9

Real-Time Clock ................................................... 9

Watchdog Timer .................................................. 9

Timers ............................................................. 10

Serial Ports (SPORTs) .......................................... 10

Serial Peripheral Interface (SPI) Ports ...................... 10

2-Wire Interface ................................................. 11

UART Ports ...................................................... 11

Programmable I/O Pins ........................................ 11

Parallel Peripheral Interface ................................... 12

Controller Area Network (CAN) Interface ................ 13

Media Transceiver MAC layer (MXVR) ................... 13

Dynamic Power Management ................................ 13

Voltage Regulation .............................................. 15

Clock Signals ..................................................... 15

Booting Modes ................................................... 16

Instruction Set Description ................................... 17

Development Tools ............................................. 17

Designing an Emulator Compatible Processor Board ... 18

Example Connections and Layout Considerations ...... 18

Voltage Regulator Layout Guidelines ....................... 20

MXVR Board Layout Guidelines ............................ 19

Pin Descriptions .................................................... 21

REVISION HISTORY

2/08—Rev. 0 to Rev. A

Identifying pins CANRX and PC4 as 5 V-tolerant when config-

ured as an input and an open-drain when configured as an

output.

Specifications ........................................................ 26

Operating Conditions ........................................... 26

Electrical Characteristics ....................................... 27

Absolute Maximum Ratings ................................... 28

Package Information ............................................ 28

ESD Sensitivity ................................................... 28

Timing Specifications ........................................... 29

Clock and Reset Timing ..................................... 30

Asynchronous Memory Read Cycle Timing ............ 31

Asynchronous Memory Write Cycle Timing ........... 33

SDRAM Interface Timing .................................. 35

External Port Bus Request and Grant Cycle Timing .. 36

Parallel Peripheral Interface Timing ...................... 38

Serial Ports Timing ........................................... 41

Serial Peripheral Interface Ports—Master Timing ..... 44

Serial Peripheral Interface Ports—Slave Timing ....... 45

General-Purpose Port Timing ............................. 46

Timer Cycle Timing .......................................... 47

JTAG Test And Emulation Port Timing ................. 48

MXVR Timing ................................................ 49

Output Drive Currents ......................................... 50

Power Dissipation ............................................... 52

Test Conditions .................................................. 52

Thermal Characteristics ........................................ 55

316-Ball CSP_BGA Ball Assignment ........................... 56

Outline Dimensions ................................................ 59

Surface-Mount Design .......................................... 60

Ordering Guide ..................................................... 60

Rev. A | Page 2 of 60 | February 2008

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