DSP56F826PB Просмотр технического описания (PDF) - Motorola => Freescale

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DSP56F826PB

16-bit Hybrid Controller

Motorola => Freescale 

Freescale Semiconductor, Inc.

Signals and Package Information

Table 3. 56F826 Signal and Package Information for the 100 Pin LQFP

Signal

Name

Pin No.

Type

Description

SCLK

(GPIOF4)

MOSI

(GPIOF5)

MISO

(GPIOF6)

SS

(GPIOF7)

TXD0

(SCLK0)

RXD0

84

Input/Output SPI Serial Clock—In master mode, this pin serves as an output, clocking

slaved listeners. In slave mode, this pin serves as the data clock input.

Input/Output Port F GPIO—This General Purpose I/O (GPIO) pin can be individually

programmed as input or output.

After reset, the default state is SCLK.

85

Input/Output SPI Master Out/Slave In (MOSI)—This serial data pin is an output from a

master device and an input to a slave device. The master device places

data on the MOSI line a half-cycle before the clock edge that the slave

device uses to latch the data.

Input/Output Port F GPIO—This General Purpose I/O (GPIO) pin can be individually

programmed as input or output.

86

Input/Output SPI Master In/Slave Out (MISO)—This serial data pin is an input to a

master device and an output from a slave device. The MISO line of a

slave device is placed in the high-impedance state if the slave device is

not selected.

Input/Output Port F GPIO—This General Purpose I/O (GPIO) pin can be individually

programmed as input or output.

After reset, the default state is MISO.

87

Input

SPI Slave Select—In master mode, this pin is used to arbitrate multiple

masters. In slave mode, this pin is used to select the slave.

Input/Output Port F GPIO—This General Purpose I/O (GPIO) pin can be individually

programmed as input or output.

After reset, the default state is SS.

97

Output

Transmit Data (TXD0)—transmit data output

Input/Output SPI Serial Clock—In master mode, this pin serves as an output, clocking

slaved listeners. In slave mode, this pin serves as the data clock input.

After reset, the default state is SCI output.

96

Input

Receive Data (RXD0)— receive data input

(MOSI0)

Input/

Output

SPI Master Out/Slave In—This serial data pin is an output from a master

device, and an input to a slave device. The master device places data on

the MOSI line one half-cycle before the clock edge the slave device uses

to latch the data.

After reset, the default state is SCI input.

56F826 Technical Data

13

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