AT91SAM9G45(2009) Просмотр технического описания (PDF) - Atmel Corporation

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производитель

AT91SAM9G45
(Rev.:2009)

AT91 ARM Thumb-based Microcontrollers

Atmel Corporation 

49.2 Errata

49.2.1 Error Corrected Code Controller (ECC)

49.2.1.1

ECC: Computation with a 1 clock cycle long NRD/NWE pulse

If the SMC is programmed with NRD/NWE pulse length equal to 1 clock cycle, HECC can't com-

pute the parity.

Problem/Fix Workaround

It is recommended to program SMC with a value superior to 1.

49.2.2 Pulse Width Modulation Controller (PWM)

49.2.2.1

PWM: Zero Period

It is impossible to update a period equal to 0 by using the PWM_CUPD register.

Problem/Fix Workaround

None

49.2.3 Serial Synchronous Controller (SSC)

49.2.3.1

SSC: Data sent without any frame synchro

When SSC is configured with the following conditions:

• RF is in input,

• TD is synchronized on a receive START (any condition: START field = 2 to 7)

• TF toggles at each start of data transfer

• Transmit STTDLY = 0

• Check TD and TF after a receive START,

The data is sent but there is not any toggle of the TF line

Problem/Fix Workaround

Transmit STTDLY must be different from 0.

49.2.3.2

SSC: Unexpected delay on TD output

When SSC is configured with the following conditions:

• TCMR.STTDLY more than 0

• RCMR.START = Start on falling edge/Start on Rising edge/Start on any edge

• RFMR.FSOS = None (input)

• TCMR.START = Receive Start

Unexpected delay of 2 or 3 system clock cycles is added to TD output.

Problem/Fix Workaround

None

1138 AT91SAM9G45

6438D–ATARM–13-Oct-09

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