AT91SAM9G45(2009) Просмотр технического описания (PDF) - Atmel Corporation

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производитель

AT91SAM9G45
(Rev.:2009)

AT91 ARM Thumb-based Microcontrollers

Atmel Corporation 

Notes:

1. Timings SSC4 and SSC7 depend on the start condition. When STTDLY = 0 (Receive start delay) and START = 4, or 5 or 7

(Receive Start Selection), two Periods of the MCK must be added to timings.

2. For output signals (TF, TD, RF), Min and Max access times are defined. The Min access time is the time between the TK (or

RK) edge and the signal change. The Max access time is the time between the TK edge and the signal stabilization. Figure

46-18 illustrates Min and Max accesses for SSC0. The same applies to SSC1, SSC4, and SSC7, SSC10 and SSC13.

Figure 46-18. Min and Max Access Time of Output Signals

TK (CKI =1)

TK (CKI =0)

TF/TD

SSC0min

SSC0max

46.15.3 ISI

46.15.3.1 Timing Conditions

Timings are given assuming capacitance loads on Table 46-38.

Table 46-38. Capacitance Load

Corner

Supply

MAX

MIN

3.3V

30pF

0 pF

1.8V

20pF

0 pF

1126 AT91SAM9G45

6438D–ATARM–13-Oct-09

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