ALC202 Просмотр технического описания (PDF) - Realtek Semiconductor

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ALC202

TWO CHANNEL AC97 AUDIO CODEC

Realtek Semiconductor 

ALC202/ALC202A

9.3 Reset

There are 3 types of reset operations: Cold, Warm and Register.

Reset Type

Cold

Register

Warm

Trigger condition

CODEC response

Assert RESET# for a specified period

Reset all hardware logic and all registers to its default

value.

Write register indexed 00h

Reset all registers to its default value.

Driven SYNC high for specified period without Reactivates AC-LINK, no change to register values.

BIT_CLK

The AC97 controller should drive SYNC and SDATA_OUT low during the period of RESET# assertion to guarantee that the

ALC202 has reset successfully.

9.4 CD Input

It is important to pay attention to differential CD input. Below is an example of differential CD input.

Example of differential CD input

9.5 Odd Addressed Register Access

The ALC202 will return “0000h” when odd-addressed and unimplemented registers are read.

9.6 Power-down Mode

It is important to pay special attention to the power down control register (index 26h), especially PR4 (powerdown AC-link).

9.7 Test Mode

To provide compatibility with AC’97 rev2.2, the ALC202 will float its digital output pins in both ATE and Vendor-Specific test

modes. Please refer to AC’97 rev2.2 section 9.2 for a detailed description of the test modes.

9.7.1 ATE In Circuit Test Mode

SDATA_OUT is sampled high at the trailing edge of RESET#. In this mode, the ALC202 will drive BIT_CLK, SDATA_IN,

EAPD and SPDIFO to high impedance.

9.7.2 Vendor Specific Test Mode

The Vendor Specific Test mode is no longer supported.

2002/07/30

34

Rev.1.28

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