ALC202/ALC202A
9.2 AC-Link
When the ALC202 receives serial data from the AC97 controller, it samples SDATA_OUT on the falling edge of BIT_CLK.
When the ALC202 sends serial data to the AC97 controller, it starts to drive SDATA_IN on the rising edge of BIT_CLK.
The ALC202 will return any uninstalled bits or registers with 0 for read operations. The ALC202 also stuffs the unimplemented
slot or bit with 0 in SDATA_IN. Note that AC-LINK is MSB-justified.
Refer to “Audio CODEC ’97 Component Specification Revision 2.1/2.2” for details.
Slot#
SYNC
SDATA-OUT
012345
TAG CMD DATA PCM PCMR
L
SDATA-IN
TAG ADD DATA PCM PCMR
R
L
6 7 8 9 10 11 12
SPDIF SPDIF
LR
Default ALC202 Slot Arrangement – CODEC ID = 00
Slot#
0 1 2 3 4 5 6 7 8 9 10 11 12
SYNC
SDATA-OUT TAG CMD DATA
SPDIF PCM PCMR SPDIF
LL
R
SDATA-IN TAG ADD DATA PCM PCMR
R
L
Default ALC202 Slot Arrangement – CODEC ID = 01,10
Slot#
012345
SYNC
SDATA-OUT TAG CMD DATA
SDATA-IN
TAG ADD DATA PCM PCMR
R
L
6 7 8 9 10 11 12
PCM PCMR
L
SPDIF SPDIF
LL
Default ALC202 slot arrangement – CODEC ID = 11
2002/07/30
33
Rev.1.28