ALC202 Просмотр технического описания (PDF) - Realtek Semiconductor

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ALC202

TWO CHANNEL AC97 AUDIO CODEC

Realtek Semiconductor 

ALC202/ALC202A

6.3 Extension Registers

6.3.1 MX76 GPIO Setup

Default: 0000h

Bit Type

Function

15

R/W GPIO Status Indication in SDATA_IN:

1: The status of GPIO0/GPIO1/JD and its valid tag are indicated in SDATA_IN

0: The status of GPIO0/GPIO1/JD and its valid tag are not indicated in SDATA_IN.

14:8

Reserved

7

R/W DCVOL (DC Volume Control) Interrupt Enable:

1: Enable 0: Disable

When the 5-bot volume code in the ramp counter ADC is changed (MX74.[4:0] is different from its

previous value), it will trigger the DCVOL interrupt in bit0 of SDATA_IN’s slot-12.

6

R/W JD (Jack-Detect) Interrupt Enable: (when pin-47 is used as Jack-Detect)

1: Enabled 0: Disabled

A low to high transaction will trigger the JD interrupt in bit0 of SDATA_IN’s slot-12.

5

R/W GPIO1 Interrupt Enable: (when GPIO1 is used as input)

1: Enabled 0: Disabled

A low to high transaction will trigger the GPIO interrupt in bit0 of SDATA_IN’s slot-12.

4

R/W GPIO0 Interrupt Enable: (when GPIO0 is used as input)

1: Enabled 0: Disabled

A low to high transaction will trigger the GPIO interrupt in bit0 of SDATA_IN’s slot-12.

3:2

Reserved

1

R/W GPIO1Primitiveness Control:

1: Set GPIO1 as output pin

0: Set GPIO1 as input pin

0

R/W GPIO0 Primitiveness Control:

1: Set GPIO0 as output pin

0: Set GPIO0 as input pin

Software can be designed to enable the JD interrupt when a “Jack Detection” event occurs.

The Bit-Allocation of GPIO/JD/DCVOL status in AC-LINK:

SYNC

SDATA-IN

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

(Slot-0) GPINT Frame Addr Data PCML PCMR

GPIO

SDATA-IN

19 18 17 16 15 14 13 12 11 10 9 8 7

(Slot-12)

*GPINT = (MX78.7 | MX78.6 | MX78.5 | MX78.4)

65 4 3 2 1 0

GPIO1 GPIO0 GPINT

JD | DCVOL

2002/07/30

21

Rev.1.28

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