ALC202 Просмотр технического описания (PDF) - Realtek Semiconductor

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ALC202

TWO CHANNEL AC97 AUDIO CODEC

Realtek Semiconductor 

7.2.5 Signal Rise and Fall Timing

Parameter

Symbol

BIT_CLK rise time

BIT_CLK fall time

SYNC rise time

Triseclk

Tfallclk

Trisesync

SYNC fall time

SDATA_IN rise time

Tfallsync

Trisedin

SDATA_IN fall time

SDATA_OUT rise time

Tfalldin

Trisedout

SDATA_OUT fall time

Tfalldout

Note 1: 75pF external load (50 pF in AC’97 rev2.1)

Note 2: rise is from 10% to 90% of Vdd (Vol to Voh)

Note 3: fall is from 90% to 10% of Vdd (Voh to Vol)

Minimum

-

-

-

-

-

-

-

-

Typical

-

-

-

-

-

-

-

-

ALC202/ALC202A

Maximum

6

6

6

6

6

6

6

6

Units

ns

ns

ns

ns

ns

ns

ns

ns

Signal Rise and Fall timing diagram

7.2.6 AC-Link Low Power Mode Timing

Parameter

End of slot 2 to BIT_CLK,

SDATA_IN low

Symbol

Ts2_pdown

Minimum

-

Typical

-

Maximum

1.0

Units

µs

AC-Link low power mode timing diagram

2002/07/30

28

Rev.1.28

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