K3304 Просмотр технического описания (PDF) - NEC => Renesas Technology

Номер в каталоге

Компоненты Описание

производитель

K3304

SWITCHING N-CHANNEL POWER MOS FET INDUSTRIAL USE

NEC => Renesas Technology 

2SK3304

ELECTRICAL CHARACTERISTICS (TA = 25 °C)

CHARACTERISTICS

SYMBOL

TEST CONDITIONS

Drain Leakage Current

IDSS

VDS = 900 V, VGS = 0 V

Gate to Source Leakage Current

IGSS

VGS = ±30 V, VDS = 0 V

Gate to Source Cut-off Voltage

VGS(off) VDS = 10 V, ID = 1.0 mA

Forward Transfer Admittance

| yfs | VDS = 20 V, ID = 4.0 A

Drain to Source On-state Resistance

RDS(on) VGS = 10 V, ID = 4.0 A

Input Capacitance

Output Capacitance

Reverse Transfer Capacitance

Ciss

Coss

Crss

VDS = 10 V

VGS = 0 V

f = 1 MHz

Turn-on Delay Time

Rise Time

Turn-off Delay Time

Fall Time

td(on)

tr

td(off)

tf

VDD = 150 V

ID = 4.0 A

VGS(on) = 10 V

RG = 10 Ω, RL ≅ 36 Ω

Total Gate Charge

Gate to Source Charge

Gate to Drain Charge

Body Diode Forward Voltage

QG

QGS

QGD

VF(S-D)

VDD = 450 V

VGS = 10 V

ID = 7.0 A

IF = 7.0 A, VGS = 0 V

Reverse Recovery Time

Reverse Recovery Charge

trr

IF = 7.0 A, VGS = 0 V

Qrr

di/dt = 50 A/µs

MIN. TYP. MAX. UNIT

100 µA

±100 nA

2.5

3.5 V

2.5 4.7

S

1.6 2.0 Ω

1300

pF

240

pF

55

pF

20

ns

44

ns

73

ns

45

ns

44

nC

6

nC

28

nC

1.0

V

2.4

µs

13.5

µC

TEST CIRCUIT 1 AVALANCHE CAPABILITY

D.U.T.

RG = 25 Ω

L

PG.

50 Ω

VDD

VGS = 20 → 0 V

ID

VDD

IAS BVDSS

VDS

Starting Tch

TEST CIRCUIT 2 SWITCHING TIME

D.U.T.

RG

PG.

VGS

0

τ

τ = 1 µs

Duty Cycle ≤ 1 %

RL

VGS

VGS

Wave Form

010 %

VGS(on) 90 %

VDD

ID

90 %

ID

ID

0 10 %

Wave Form

90 %

10 %

td(on) tr td(off) tf

ton

toff

TEST CIRCUIT 3 GATE CHARGE

D.U.T.

IG = 2 mA

RL

PG.

50 Ω

VDD

2

Data Sheet D13992EJ1V0DS00

Share Link: