BD82HM55QMNT Просмотр технического описания (PDF) - Intel
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BD82HM55QMNT Datasheet PDF : 934 Pages
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17.2.14WALCLK—Wall Clock Counter Register
(Intel® High Definition Audio Controller—D27:F0)..................................... 722
17.2.15SSYNC—Stream Synchronization Register
(Intel® High Definition Audio Controller—D27:F0)..................................... 723
17.2.16CORBLBASE—CORB Lower Base Address Register
(Intel® High Definition Audio Controller—D27:F0)..................................... 723
17.2.17CORBUBASE—CORB Upper Base Address Register
(Intel® High Definition Audio Controller—D27:F0)..................................... 724
17.2.18CORBWP—CORB Write Pointer Register
(Intel® High Definition Audio Controller—D27:F0)..................................... 724
17.2.19CORBRP—CORB Read Pointer Register
(Intel® High Definition Audio Controller—D27:F0)..................................... 724
17.2.20CORBCTL—CORB Control Register
(Intel® High Definition Audio Controller—D27:F0)..................................... 725
17.2.21CORBST—CORB Status Register
(Intel® High Definition Audio Controller—D27:F0)..................................... 725
17.2.22CORBSIZE—CORB Size Register
Intel® High Definition Audio Controller—D27:F0) ...................................... 725
17.2.23RIRBLBASE—RIRB Lower Base Address Register
(Intel® High Definition Audio Controller—D27:F0)..................................... 726
17.2.24RIRBUBASE—RIRB Upper Base Address Register
(Intel® High Definition Audio Controller—D27:F0)..................................... 726
17.2.25RIRBWP—RIRB Write Pointer Register
(Intel® High Definition Audio Controller—D27:F0)..................................... 726
17.2.26RINTCNT—Response Interrupt Count Register
(Intel® High Definition Audio Controller—D27:F0)..................................... 727
17.2.27RIRBCTL—RIRB Control Register
(Intel® High Definition Audio Controller—D27:F0)..................................... 727
17.2.28RIRBSTS—RIRB Status Register
(Intel® High Definition Audio Controller—D27:F0)..................................... 728
17.2.29RIRBSIZE—RIRB Size Register
(Intel® High Definition Audio Controller—D27:F0)..................................... 728
17.2.30IC—Immediate Command Register
(Intel® High Definition Audio Controller—D27:F0)..................................... 728
17.2.31IR—Immediate Response Register
(Intel® High Definition Audio Controller—D27:F0)..................................... 729
17.2.32IRS—Immediate Command Status Register
(Intel® High Definition Audio Controller—D27:F0)..................................... 729
17.2.33DPLBASE—DMA Position Lower Base Address Register
(Intel® High Definition Audio Controller—D27:F0)..................................... 730
17.2.34DPUBASE—DMA Position Upper Base Address Register
(Intel® High Definition Audio Controller—D27:F0)..................................... 730
17.2.35SDCTL—Stream Descriptor Control Register
(Intel® High Definition Audio Controller—D27:F0)..................................... 731
17.2.36SDSTS—Stream Descriptor Status Register
(Intel® High Definition Audio Controller—D27:F0)..................................... 733
17.2.37SDLPIB—Stream Descriptor Link Position in Buffer
Register (Intel® High Definition Audio Controller—D27:F0) ........................ 734
17.2.38SDCBL—Stream Descriptor Cyclic Buffer Length Register
(Intel® High Definition Audio Controller—D27:F0)..................................... 734
17.2.39SDLVI—Stream Descriptor Last Valid Index Register
(Intel® High Definition Audio Controller—D27:F0)..................................... 735
17.2.40SDFIFOW—Stream Descriptor FIFO Watermark Register
(Intel® High Definition Audio Controller—D27:F0)..................................... 735
17.2.41SDFIFOS—Stream Descriptor FIFO Size Register
(Intel® High Definition Audio Controller—D27:F0)..................................... 736
17.2.42SDFMT—Stream Descriptor Format Register
(Intel® High Definition Audio Controller—D27:F0)..................................... 737
17.2.43SDBDPL—Stream Descriptor Buffer Descriptor List
Pointer Lower Base Address Register
(Intel® High Definition Audio Controller—D27:F0)..................................... 738
17.2.44SDBDPU—Stream Descriptor Buffer Descriptor List
Pointer Upper Base Address Register
(Intel® High Definition Audio Controller—D27:F0)..................................... 738
18 SMBus Controller Registers (D31:F3) .................................................................... 739
18.1 PCI Configuration Registers (SMBus—D31:F3)..................................................... 739
Datasheet
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