AT91SAM9G10-CU Просмотр технического описания (PDF) - Atmel Corporation

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AT91SAM9G10-CU

AT91 ARM Thumb-based Microcontrollers

Atmel Corporation 

7.2 Debug and Test Features

• Integrated Embedded In-circuit Emulator Real-Time

– Two real-time Watchpoint Units

– Two Independent Registers: Debug Control Register and Debug Status Register

– Test Access Port Accessible through JTAG Protocol

– Debug Communications Channel

• Debug Unit

– Two-pin UART

– Debug Communication Channel Interrupt Handling

– Chip ID Register

• IEEE1149.1 JTAG Boundary-scan on All Digital Pins

7.3 Bus Matrix

• Five Masters and Five Slaves handled

– Handles Requests from the ARM926EJ-S, USB Host Port, LCD Controller and the

Peripheral DMA Controller to internal ROM, internal SRAM, EBI, APB, LCD

Controller and USB Host Port.

– Round-Robin Arbitration (three modes supported: no default master, last accessed

default master, fixed default master)

– Burst Breaking with Slot Cycle Limit

• One Address Decoder Provided per Master

– Three different slaves may be assigned to each decoded memory area: one for

internal boot, one for external boot, one after remap.

• Boot Mode Select Option

– Non-volatile Boot Memory can be Internal or External.

– Selection is made by BMS pin sampled at reset.

• Remap Command

– Allows Remapping of an Internal SRAM in Place of the Boot Non-Volatile Memory

– Allows Handling of Dynamic Exception Vectors

7.4 Peripheral DMA Controller

• Transfers from/to peripheral to/from any memory space without intervention of the processor.

• Next Pointer Support, forbids strong real-time constraints on buffer management.

• Nineteen channels

– Two for each USART

– Two for the Debug Unit

– Two for each Serial Synchronous Controller

– Two for each Serial Peripheral Interface

– One for the Multimedia Card Interface

14 AT91SAM9G10

6462A–ATARM–03-Jun-09

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