T8302 Просмотр технического описания (PDF) - Agere -> LSI Corporation

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T8302

Internet Protocol Telephone Advanced RISC Machine (ARM®) Ethernet QoS Using IEEE® 802.1q

Agere -> LSI Corporation 

T8302 Internet Protocol Telephone

Advanced RISC Machine (ARM )

Data Sheet

July 2001

1 Introduction (continued)

1.2 IPT_DSP Features

The IPT_ARM is intended to be used with its companion IC, the audio digital signal-processor integrated circuit

(IPT_DSP). The combination of the IPT_ARM and the IPT_DSP provides a powerful solution for the implementa-

tion of the IP exchange business phone. The features of the IPT_DSP are as follows:

s DSP1627 core with bit manipulation unit.

s DSP clock speeds up to 80 MHz.

s Instruction ROM, 32K x 16 (zero wait-state at 80 MHz).

s Dual-port RAM, 6K x 16 (zero wait-state at 80 MHz).

s Internal SRAM, 16K x 16 (single wait-state at 80 MHz).

s 16-bit analog-to-digital converter.

s Programmable gain amplifier on audio input.

s Fixed gain differential microphone input.

s Analog input SRAM buffer, 512 x 16.

s Timed DMA for analog input SRAM.

s Two 16-bit digital-to-analog converters.

s Independent simultaneous speaker and handset outputs.

s Two integrated differential speaker driver outputs.

s Two analog output SRAM buffers, 512 x 16 each.

s Two timed DMA outputs for simultaneous handset and speaker audio output.

s Low-pass filtering on audio inputs and outputs.

s Serial I/O interface.

s General-purpose timer counter.

s Bit I/O interface.

s JTAG test and debugging control.

s Implementation in 0.35 µm, 5 V silicon technology.

s Packaged in 100-pin TQFP.

16

Agere Systems Inc.

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