NLVSX4373MUTAG Просмотр технического описания (PDF) - ON Semiconductor
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NLVSX4373MUTAG Datasheet PDF : 12 Pages
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NLSX4373
TIMING CHARACTERISTICS − RAIL−TO−RAIL DRIVING CONFIGURATIONS
(I/O test circuit of Figures 2 and 3, CLOAD = 15 pF, driver output impedance v 50 W, RLOAD = 1 MW)
−405C to +855C
(Notes 3 and 4)
Symbol
Parameter
VL = 3.6 V, VCC = 2.5 V
tRVCC I/O VCC Risetime
tFVCC I/O VCC Falltime
tRVL
I/O VL Risetime
tFVL
I/O VL Falltime
tPDVL−VCC Propagation Delay (Driving I/O VL)
tPDVCC−VL Propagation Delay (Driving I/O VCC)
tPPSKEW Part−to−Part Skew
Maximum Data Rate
Test Conditions
Min
Typ
Max Unit
15 ns
10 ns
15 ns
15 ns
15 ns
15 ns
5 nS
20
Mb/s
VL = 5.5 V, VCC = 1.5 V
tRVCC I/O VCC Risetime
tFVCC I/O VCC Falltime
tRVL
I/O VL Risetime
tFVL
I/O VL Falltime
tPDVL−VCC Propagation Delay (Driving I/O VL)
tPDVCC−VL Propagation Delay (Driving I/O VCC)
tPPSKEW Part−to−Part Skew
Maximum Data Rate
30 ns
10 ns
15 ns
20 ns
20 ns
20 ns
5 nS
20
Mb/s
3. Typical values are for VCC = +3.3 V, VL = +1.8 V and TA = +25°C.
4. All units are production tested at TA = +25°C. Limits over the operating temperature range are guaranteed by design.
TIMING CHARACTERISTICS − OPEN DRAIN DRIVING CONFIGURATIONS
(I/O test circuit of Figures 4 and 5, CLOAD = 15 pF, driver output impedance v 50 W, RLOAD = 1 MW)
−405C to +855C
(Notes 5 and 6)
Symbol
Parameter
Test Conditions
Min Typ
+1.5 v VL v VCC v +5.5 V
tRVCC I/O VCC Risetime
tFVCC I/O VCC Falltime
tRVL
I/O VL Risetime
tFVL
I/O VL Falltime
tPDVL−VCC Propagation Delay (Driving I/O VL)
tPDVCC−VL Propagation Delay (Driving I/O VCC)
tPPSKEW Part−to−Part Skew
MDR Maximum Data Rate
2
5. Typical values are for VCC = +3.3 V, VL = +1.8 V and TA = +25°C.
6. All units are production tested at TA = +25°C. Limits over the operating temperature range are guaranteed by design.
Max Unit
400 ns
50 ns
400 ns
60 ns
1000 ns
1000 ns
50 nS
Mb/s
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