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83C196MD Просмотр технического описания (PDF) - Intel

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83C196MD Datasheet PDF : 25 Pages
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8XC196MD
PIN DESCRIPTIONS (Alphabetically Ordered) (Continued)
Symbol
Function
PORT2
8-bit bidirectional I O port All of the Port2 pins are shared with the EPA I O
pins (CAPCOMP0 – 3 and COMPARE0 – 3)
PORT3
PORT4
8-bit bidirectional I O ports with open drain outputs These pins are shared
with the multiplexed address data bus which uses strong internal pullups
PORT5
8-bit bidirectional I O port 7 of the pins are shared with bus control signals
(ALE INST WR RD BHE READY BUSWIDTH) Can be used as standard
IO
PORT6
8-bit output port P6 6 and P6 7 output PWM the others are used as the Wave
Form Generator outputs Can be used as standard output ports
PORT7
8-bit bidirectional I O port P7 0 – P7 3 can be used as EPA I O pins
(CAPCOMP4–5 and COMPARE4 – 5) P7 7 can be used as FREQOUT output
pin P7 4–P7 6 are standard I O pins
PWM0 PWM1
(P6 6 P6 7)
Programmable duty cycle Programmable frequency Pulse Width Modulator
pins The duty cycle has a resolution of 256 steps and the frequency can vary
from 122 Hz to 31 KHz (16 MHz input clock) Pins may be configured as
standard output if PWM is not used
RD (P5 3)
Read signal output to external memory RD is low only during external memory
reads Can be used as standard I O when not used as RD
READY (P5 6)
Ready input to lengthen external memory cycles If READY e 0 the memory
controller inserts wait states until the next positive transition of CLKOUT
occurs with READY e 1 Can be used as standard I O when not used as
READY
RESET
Reset input to and open-drain output from the chip Held low for at least 16
state times to reset the chip Input high for normal operation RESET has an
Ohmic internal pullup resistor
T1CLK
(P1 2)
Timer 1 Clock input This pin has two other alternate functions ACH10 and
P1 2
T1DIR
(P1 3)
Timer 1 Direction input This pin has two other alternate functions ACH11 and
P1 3
VPP
WG1–WG3 WG1 –WG3
(P6 0–P6 5)
The programming voltage is applied to this pin It is also the timing pin for the
return from Power Down circuit Connect this pin with a 1 mF capacitor to VSS
and a 1 MX resistor to VCC If the Power Down feature is not used connect
the pin to VCC
3 phase output signals and their complements used in motor control
applications The pins can also be configured as standard output pins
WR WRL (P5 2)
Write and Write Low output to external memory WR will go low every external
write WRL will go low only for external writes to an even byte Can be used as
standard I O when not used as WR WRL
XTAL1
Input of the oscillator inverter and the internal clock generator This pin should
be used when using an external clock source
XTAL2
Output of the oscillator inverter
PMODE
(P0 4–7)
Determines the EPROM programming mode
PACT
(P2 5)
A low signal in Auto Programming mode indicates that programming is in
process A high signal indicates programming is complete
10

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