MT90222 Просмотр технического описания (PDF) - Zarlink Semiconductor Inc

Номер в каталоге

Компоненты Описание

производитель

MT90222

T1/E1/J1 Single Chip Transceiver

Zarlink Semiconductor Inc 

MT90222/3/4

Data Sheet

MT90223 Pin Description (continued)

Pin #

Name I/O

Description

L1,

L2,

L4,

L3,

K1

B7,A7,D8,C8,

B8,D9,C9,B9

A9,C10,B10,

A10,C11,D11,B1

1,A11,C12,D12,

B12,A12,C13,B1

3,A14,B14,C14,

A15,B15

D15

A16,B16

AE8,AD8,AF7,A

E7,AD7,AC7,AF

6,AD6,AF5,AE5,

AD5,AE4,AF3,A

D4,AE3,AF2

AE12,AC12,

AF11,AE11,

AC11,AD11,

AF10,AE10,

AD10,AF9,

AE9,AD9

AF12

AD13

AE13

AC9

URxAddr

[4:0]

sr_d

[7:0]

sr_a

[18:0]

sr_we

sr_cs_1, 0

up_d

[15:0]

up_a

[11:0]

up_r/w

or

up_wr

up_oe

or

up_rd

up_cs

up_irq

I Receive Address. Five bit wide address bus driven from the ATM to PHY device to

select the appropriate PHY address. URxAddr[4] is the MSB.

Receiver Static Memory Interface Signals

I/O Static Memory Data Bus. Data Bus to exchange data between the MT90223 and the

external static memory. sr_d[7:0] has internal weak pull-downs.

O Static Memory Address Bus. Address bus on the external static memory.

O Static Memory Read/Not Write. If low, data is written from the MT90223 to the

memory. If high, data is read from the memory to the MT90223.

O Static Memory Chip Select Signal. Active low.

Processor Interface Signals

I/O Processor Data Bus. Data Bus to exchange data between the MT90223 and a local

processor.

I Processor Address Bus. Used to select the internal registers and memory locations

of the MT90223.

I Processor Read/Not Write. Motorola Mode. This is an input signal. If low, data is

written from the processor to the MT90223. If high, data is read from the MT90223 to

the processor.

Processor Not Write (Intel Mode). This is an input signal, active low. If low, data is

written from the processor to the MT90223.

I Output enable (Motorola Mode). This is an input signal. This signal should be tied to

GND for Motorola timing mode.

Processor Read (Intel Mode). This is an input signal, active low. If low, data is read

from the MT90223.

I Chip Select. This is an active low input signal. If this signal is high, the MT90223

ignores all other signals on its processor bus. If this signal is low, the MT90223

accepts the signals on its processor bus.

O Processor Interrupt Request. Open drain signal. If this signal is low, the MT90223

signals to the processor that an interrupt condition is pending inside the MT90223.

21

Zarlink Semiconductor Inc.

Share Link: